target/nios2: Move R_FOO and CR_BAR into enumerations

These symbols become available to the debugger.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-31-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-21 08:17:01 -07:00
parent 17c20fe3c8
commit bdb307b4d8
1 changed files with 35 additions and 37 deletions

View File

@ -61,25 +61,43 @@ struct Nios2CPUClass {
#define NUM_CR_REGS 32 #define NUM_CR_REGS 32
/* General purpose register aliases */ /* General purpose register aliases */
#define R_ZERO 0 enum {
#define R_AT 1 R_ZERO = 0,
#define R_RET0 2 R_AT = 1,
#define R_RET1 3 R_RET0 = 2,
#define R_ARG0 4 R_RET1 = 3,
#define R_ARG1 5 R_ARG0 = 4,
#define R_ARG2 6 R_ARG1 = 5,
#define R_ARG3 7 R_ARG2 = 6,
#define R_ET 24 R_ARG3 = 7,
#define R_BT 25 R_ET = 24,
#define R_GP 26 R_BT = 25,
#define R_SP 27 R_GP = 26,
#define R_FP 28 R_SP = 27,
#define R_EA 29 R_FP = 28,
#define R_BA 30 R_EA = 29,
#define R_RA 31 R_BA = 30,
R_RA = 31,
};
/* Control register aliases */ /* Control register aliases */
#define CR_STATUS 0 enum {
CR_STATUS = 0,
CR_ESTATUS = 1,
CR_BSTATUS = 2,
CR_IENABLE = 3,
CR_IPENDING = 4,
CR_CPUID = 5,
CR_EXCEPTION = 7,
CR_PTEADDR = 8,
CR_TLBACC = 9,
CR_TLBMISC = 10,
CR_ENCINJ = 11,
CR_BADADDR = 12,
CR_CONFIG = 13,
CR_MPUBASE = 14,
CR_MPUACC = 15,
};
FIELD(CR_STATUS, PIE, 0, 1) FIELD(CR_STATUS, PIE, 0, 1)
FIELD(CR_STATUS, U, 1, 1) FIELD(CR_STATUS, U, 1, 1)
@ -98,24 +116,12 @@ FIELD(CR_STATUS, RSIE, 23, 1)
#define CR_STATUS_NMI R_CR_STATUS_NMI_MASK #define CR_STATUS_NMI R_CR_STATUS_NMI_MASK
#define CR_STATUS_RSIE R_CR_STATUS_RSIE_MASK #define CR_STATUS_RSIE R_CR_STATUS_RSIE_MASK
#define CR_ESTATUS 1
#define CR_BSTATUS 2
#define CR_IENABLE 3
#define CR_IPENDING 4
#define CR_CPUID 5
#define CR_CTL6 6
#define CR_EXCEPTION 7
FIELD(CR_EXCEPTION, CAUSE, 2, 5) FIELD(CR_EXCEPTION, CAUSE, 2, 5)
FIELD(CR_EXCEPTION, ECCFTL, 31, 1) FIELD(CR_EXCEPTION, ECCFTL, 31, 1)
#define CR_PTEADDR 8
FIELD(CR_PTEADDR, VPN, 2, 20) FIELD(CR_PTEADDR, VPN, 2, 20)
FIELD(CR_PTEADDR, PTBASE, 22, 10) FIELD(CR_PTEADDR, PTBASE, 22, 10)
#define CR_TLBACC 9
FIELD(CR_TLBACC, PFN, 0, 20) FIELD(CR_TLBACC, PFN, 0, 20)
FIELD(CR_TLBACC, G, 20, 1) FIELD(CR_TLBACC, G, 20, 1)
FIELD(CR_TLBACC, X, 21, 1) FIELD(CR_TLBACC, X, 21, 1)
@ -130,8 +136,6 @@ FIELD(CR_TLBACC, IG, 25, 7)
#define CR_TLBACC_X R_CR_TLBACC_X_MASK #define CR_TLBACC_X R_CR_TLBACC_X_MASK
#define CR_TLBACC_G R_CR_TLBACC_G_MASK #define CR_TLBACC_G R_CR_TLBACC_G_MASK
#define CR_TLBMISC 10
FIELD(CR_TLBMISC, D, 0, 1) FIELD(CR_TLBMISC, D, 0, 1)
FIELD(CR_TLBMISC, PERM, 1, 1) FIELD(CR_TLBMISC, PERM, 1, 1)
FIELD(CR_TLBMISC, BAD, 2, 1) FIELD(CR_TLBMISC, BAD, 2, 1)
@ -150,12 +154,6 @@ FIELD(CR_TLBMISC, EE, 24, 1)
#define CR_TLBMISC_PERM R_CR_TLBMISC_PERM_MASK #define CR_TLBMISC_PERM R_CR_TLBMISC_PERM_MASK
#define CR_TLBMISC_D R_CR_TLBMISC_D_MASK #define CR_TLBMISC_D R_CR_TLBMISC_D_MASK
#define CR_ENCINJ 11
#define CR_BADADDR 12
#define CR_CONFIG 13
#define CR_MPUBASE 14
#define CR_MPUACC 15
/* Exceptions */ /* Exceptions */
#define EXCP_BREAK 0x1000 #define EXCP_BREAK 0x1000
#define EXCP_RESET 0 #define EXCP_RESET 0