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target/s390x: Split out gen_ri2 

Use tcg_constant_i64.  Adjust in2_mri2_* to allocate a new
temporary for the output, using gen_ri2 for the address.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-26 17:55:31 -10:00
parent 2f668fabbc
commit bdbc87e323
1 changed files with 14 additions and 9 deletions
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23
target/s390x/tcg/translate.c
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@ -5886,9 +5886,14 @@ static void in2_a2(DisasContext *s, DisasOps *o)
}
#define SPEC_in2_a2 0
static TCGv gen_ri2(DisasContext *s)
{
return tcg_constant_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
}
static void in2_ri2(DisasContext *s, DisasOps *o)
{
o->in2 = tcg_const_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
o->in2 = gen_ri2(s);
}
#define SPEC_in2_ri2 0
@ -5976,29 +5981,29 @@ static void in2_m2_64a(DisasContext *s, DisasOps *o)
static void in2_mri2_16u(DisasContext *s, DisasOps *o)
{
in2_ri2(s, o);
tcg_gen_qemu_ld16u(o->in2, o->in2, get_mem_index(s));
o->in2 = tcg_temp_new_i64();
tcg_gen_qemu_ld16u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_16u 0
static void in2_mri2_32s(DisasContext *s, DisasOps *o)
{
in2_ri2(s, o);
tcg_gen_qemu_ld32s(o->in2, o->in2, get_mem_index(s));
o->in2 = tcg_temp_new_i64();
tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32s 0
static void in2_mri2_32u(DisasContext *s, DisasOps *o)
{
in2_ri2(s, o);
tcg_gen_qemu_ld32u(o->in2, o->in2, get_mem_index(s));
o->in2 = tcg_temp_new_i64();
tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32u 0
static void in2_mri2_64(DisasContext *s, DisasOps *o)
{
in2_ri2(s, o);
tcg_gen_qemu_ld64(o->in2, o->in2, get_mem_index(s));
o->in2 = tcg_temp_new_i64();
tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_64 0