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Convert add 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-05-10 07:19:17 +00:00
parent 8393617c1a
commit bdf9f35dad
2 changed files with 99 additions and 21 deletions
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93
target-sparc/op_helper.c
View File

@ -756,6 +756,17 @@ static uint32_t compute_C_flags(void)
return env->psr & PSR_CARRY;
}
static inline uint32_t get_NZ_icc(target_ulong dst)
{
uint32_t ret = 0;
if (!(dst & 0xffffffffULL))
ret |= PSR_ZERO;
if ((int32_t) (dst & 0xffffffffULL) < 0)
ret |= PSR_NEG;
return ret;
}
#ifdef TARGET_SPARC64
static uint32_t compute_all_flags_xcc(void)
{
@ -767,6 +778,86 @@ static uint32_t compute_C_flags_xcc(void)
return env->xcc & PSR_CARRY;
}
static inline uint32_t get_NZ_xcc(target_ulong dst)
{
uint32_t ret = 0;
if (!dst)
ret |= PSR_ZERO;
if ((int64_t)dst < 0)
ret |= PSR_NEG;
return ret;
}
#endif
static inline uint32_t get_C_add_icc(target_ulong dst, target_ulong src1)
{
uint32_t ret = 0;
if ((dst & 0xffffffffULL) < (src1 & 0xffffffffULL))
ret |= PSR_CARRY;
return ret;
}
static inline uint32_t get_V_add_icc(target_ulong dst, target_ulong src1,
target_ulong src2)
{
uint32_t ret = 0;
if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 31))
ret |= PSR_OVF;
return ret;
}
static uint32_t compute_all_add(void)
{
uint32_t ret;
ret = get_NZ_icc(CC_DST);
ret |= get_C_add_icc(CC_DST, CC_SRC);
ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
return ret;
}
static uint32_t compute_C_add(void)
{
return get_C_add_icc(CC_DST, CC_SRC);
}
#ifdef TARGET_SPARC64
static inline uint32_t get_C_add_xcc(target_ulong dst, target_ulong src1)
{
uint32_t ret = 0;
if (dst < src1)
ret |= PSR_CARRY;
return ret;
}
static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1,
target_ulong src2)
{
uint32_t ret = 0;
if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 63))
ret |= PSR_OVF;
return ret;
}
static uint32_t compute_all_add_xcc(void)
{
uint32_t ret;
ret = get_NZ_xcc(CC_DST);
ret |= get_C_add_xcc(CC_DST, CC_SRC);
ret |= get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2);
return ret;
}
static uint32_t compute_C_add_xcc(void)
{
return get_C_add_xcc(CC_DST, CC_SRC);
}
#endif
typedef struct CCTable {
@ -777,12 +868,14 @@ typedef struct CCTable {
static const CCTable icc_table[CC_OP_NB] = {
/* CC_OP_DYNAMIC should never happen */
[CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
[CC_OP_ADD] = { compute_all_add, compute_C_add },
};
#ifdef TARGET_SPARC64
static const CCTable xcc_table[CC_OP_NB] = {
/* CC_OP_DYNAMIC should never happen */
[CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
[CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },
};
#endif

27
target-sparc/translate.c
View File

@ -459,27 +459,12 @@ static inline void gen_tag_tv(TCGv src1, TCGv src2)
gen_set_label(l1);
}
static inline void gen_op_add_cc2(TCGv dst)
{
gen_cc_clear_icc();
gen_cc_NZ_icc(cpu_cc_dst);
gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
#ifdef TARGET_SPARC64
gen_cc_clear_xcc();
gen_cc_NZ_xcc(cpu_cc_dst);
gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
#endif
tcg_gen_mov_tl(dst, cpu_cc_dst);
}
static inline void gen_op_addi_cc(TCGv dst, TCGv src1, target_long src2)
{
tcg_gen_mov_tl(cpu_cc_src, src1);
tcg_gen_movi_tl(cpu_cc_src2, src2);
tcg_gen_addi_tl(cpu_cc_dst, cpu_cc_src, src2);
gen_op_add_cc2(dst);
tcg_gen_mov_tl(dst, cpu_cc_dst);
}
static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
@ -487,7 +472,7 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
tcg_gen_mov_tl(cpu_cc_src, src1);
tcg_gen_mov_tl(cpu_cc_src2, src2);
tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
gen_op_add_cc2(dst);
tcg_gen_mov_tl(dst, cpu_cc_dst);
}
static inline void gen_op_addx_cc2(TCGv dst)
@ -3153,16 +3138,16 @@ static void disas_sparc_insn(DisasContext * dc)
simm = GET_FIELDs(insn, 19, 31);
if (xop & 0x10) {
gen_op_addi_cc(cpu_dst, cpu_src1, simm);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD);
dc->cc_op = CC_OP_ADD;
} else {
tcg_gen_addi_tl(cpu_dst, cpu_src1, simm);
}
} else {
if (xop & 0x10) {
gen_op_add_cc(cpu_dst, cpu_src1, cpu_src2);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS;
tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD);
dc->cc_op = CC_OP_ADD;
} else {
tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2);
}