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target-i386: optimize setle

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And allow gen_setcc_slow to operate on cpu_cc_src.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2013-01-23 13:53:51 -08:00
parent 2cb4764577
commit be10b289d6
1 changed files with 6 additions and 9 deletions
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15
target-i386/translate.c
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@ -1045,7 +1045,6 @@ static void gen_compute_eflags_z(DisasContext *s, TCGv reg, bool inv)
static void gen_setcc_slow(DisasContext *s, int jcc_op, TCGv reg, bool inv) static void gen_setcc_slow(DisasContext *s, int jcc_op, TCGv reg, bool inv)
{ {
assert(!TCGV_EQUAL(reg, cpu_cc_src));
switch(jcc_op) { switch(jcc_op) {
case JCC_O: case JCC_O:
gen_compute_eflags_o(s, reg); gen_compute_eflags_o(s, reg);
@ -1072,20 +1071,18 @@ static void gen_setcc_slow(DisasContext *s, int jcc_op, TCGv reg, bool inv)
break; break;
case JCC_L: case JCC_L:
gen_compute_eflags(s); gen_compute_eflags(s);
tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */ tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 11); /* CC_O */
tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 7); /* CC_S */ tcg_gen_shri_tl(reg, cpu_cc_src, 7); /* CC_S */
tcg_gen_xor_tl(reg, reg, cpu_tmp0); tcg_gen_xor_tl(reg, reg, cpu_tmp0);
tcg_gen_andi_tl(reg, reg, 1); tcg_gen_andi_tl(reg, reg, 1);
break; break;
default: default:
case JCC_LE: case JCC_LE:
gen_compute_eflags(s); gen_compute_eflags(s);
tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */ tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 4); /* CC_O -> CC_S */
tcg_gen_shri_tl(cpu_tmp4, cpu_cc_src, 7); /* CC_S */ tcg_gen_xor_tl(reg, cpu_tmp0, cpu_cc_src);
tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 6); /* CC_Z */ tcg_gen_andi_tl(reg, reg, CC_S | CC_Z);
tcg_gen_xor_tl(reg, reg, cpu_tmp4); tcg_gen_setcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, reg, reg, 0);
tcg_gen_or_tl(reg, reg, cpu_tmp0);
tcg_gen_andi_tl(reg, reg, 1);
break; break;
} }
if (inv) { if (inv) {