tests/tcg/xtensa: enable system tests
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
This commit is contained in:
Alex Bennée
parent
c72d9df181
commit
be5cac175a
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@ -1,102 +0,0 @@
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-include ../../../config-host.mak
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CORE=dc232b
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CROSS=xtensa-$(CORE)-elf-
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ifndef XT
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SIM = ../../../xtensa-softmmu/qemu-system-xtensa
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SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
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SIMDEBUG = -s -S
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else
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SIM = xt-run
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SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS)
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SIMDEBUG = --gdbserve=0
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endif
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HOST_CC = gcc
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CC = $(CROSS)gcc
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AS = $(CROSS)gcc -x assembler-with-cpp
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LD = $(CROSS)ld
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ASFLAGS = -Wa,--no-absolute-literals
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vectors_ASFLAGS = -mtext-section-literals
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XTENSA_SRC_PATH = $(SRC_PATH)/tests/tcg/xtensa
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INCLUDE_DIRS = $(XTENSA_SRC_PATH) $(SRC_PATH)/target/xtensa/core-$(CORE)
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XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS))
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LDFLAGS = -Tlinker.ld
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CRT = crt.o vectors.o
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TESTCASES += test_b.tst
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TESTCASES += test_bi.tst
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TESTCASES += test_boolean.tst
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TESTCASES += test_break.tst
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TESTCASES += test_bz.tst
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TESTCASES += test_cache.tst
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TESTCASES += test_clamps.tst
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TESTCASES += test_extui.tst
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TESTCASES += test_fail.tst
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TESTCASES += test_flix.tst
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TESTCASES += test_fp0_arith.tst
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TESTCASES += test_fp0_conv.tst
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TESTCASES += test_fp1.tst
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TESTCASES += test_fp_cpenable.tst
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TESTCASES += test_interrupt.tst
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TESTCASES += test_loop.tst
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TESTCASES += test_lsc.tst
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TESTCASES += test_mac16.tst
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TESTCASES += test_max.tst
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TESTCASES += test_min.tst
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TESTCASES += test_mmu.tst
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TESTCASES += test_mul16.tst
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TESTCASES += test_mul32.tst
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TESTCASES += test_nsa.tst
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TESTCASES += test_phys_mem.tst
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ifdef XT
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TESTCASES += test_pipeline.tst
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endif
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TESTCASES += test_quo.tst
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TESTCASES += test_rem.tst
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TESTCASES += test_rst0.tst
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TESTCASES += test_s32c1i.tst
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TESTCASES += test_sar.tst
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TESTCASES += test_sext.tst
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TESTCASES += test_shift.tst
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TESTCASES += test_sr.tst
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TESTCASES += test_timer.tst
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TESTCASES += test_windowed.tst
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all: build
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linker.ld: $(XTENSA_SRC_PATH)/linker.ld.S
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$(HOST_CC) $(XTENSA_INC) -E -P $< -o $@
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%.o: $(XTENSA_SRC_PATH)/%.c
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$(CC) $(XTENSA_INC) $(CFLAGS) -c $< -o $@
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%.o: $(XTENSA_SRC_PATH)/%.S
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$(CC) $(XTENSA_INC) $($*_ASFLAGS) $(ASFLAGS) -c $< -o $@
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%.tst: %.o linker.ld $(XTENSA_SRC_PATH)/macros.inc $(CRT) Makefile
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$(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@
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build: $(TESTCASES)
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check: $(addprefix run-, $(TESTCASES))
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run-%.tst: %.tst
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$(SIM) $(SIMFLAGS) ./$<
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run-test_fail.tst: test_fail.tst
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! $(SIM) $(SIMFLAGS) ./$<
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debug-%.tst: %.tst
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$(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$<
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host-debug-%.tst: %.tst
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gdb --args $(SIM) $(SIMFLAGS) ./$<
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clean:
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$(RM) -fr $(TESTCASES) $(CRT) linker.ld
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@ -0,0 +1,42 @@
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#
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# Xtensa softmmu tests
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#
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ifneq ($(TARGET_WORDS_BIGENDIAN),y)
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XTENSA_SRC = $(SRC_PATH)/tests/tcg/xtensa
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XTENSA_ALL = $(filter-out $(XTENSA_SRC)/linker.ld.S,$(wildcard $(XTENSA_SRC)/*.S))
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XTENSA_TESTS = $(patsubst $(XTENSA_SRC)/%.S, %, $(XTENSA_ALL))
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# Filter out common blobs and broken tests
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XTENSA_BROKEN_TESTS = crt vectors test_boolean test_pipeline test_fail
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XTENSA_USABLE_TESTS = $(filter-out $(XTENSA_BROKEN_TESTS), $(XTENSA_TESTS))
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# add to the list of tests
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TESTS += $(XTENSA_USABLE_TESTS)
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VPATH += $(XTENSA_SRC)
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CORE=dc232b
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QEMU_OPTS+=-M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
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INCLUDE_DIRS = $(SRC_PATH)/target/xtensa/core-$(CORE)
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XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS))
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vectors_ASFLAGS = -mtext-section-literals
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ASFLAGS = -Wa,--no-absolute-literals
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LDFLAGS = -Tlinker.ld -nostartfiles -nostdlib
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CRT = crt.o vectors.o
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linker.ld: linker.ld.S
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$(CC) $(XTENSA_INC) -E -P $< -o $@
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$(XTENSA_USABLE_TESTS): linker.ld macros.inc $(CRT) Makefile.softmmu-target
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# special rule for common blobs
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%.o: %.S
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$(CC) $(XTENSA_INC) $($*_ASFLAGS) $(ASFLAGS) -c $< -o $@
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%: %.S
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$(CC) $(XTENSA_INC) $(ASFLAGS) $< -o $@ $(LDFLAGS) $(NOSTDFLAGS) $(CRT)
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endif
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