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tests/tcg/tricore: Add build infrastructure

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this includes the Makefile and linker script to build all the tests.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210305170045.869437-5-kbastian@mail.uni-paderborn.de>
Message-Id: <20210512102051.12134-15-alex.bennee@linaro.org>
This commit is contained in:
Bastian Koppelmann 2021-05-12 11:20:34 +01:00 committed by Alex Bennée
parent 582079c9d2
commit be78e79949
3 changed files with 76 additions and 0 deletions
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1
MAINTAINERS
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@ -349,6 +349,7 @@ S: Maintained
F: target/tricore/ F: target/tricore/
F: hw/tricore/ F: hw/tricore/
F: include/hw/tricore/ F: include/hw/tricore/
F: tests/tcg/tricore/
Multiarch Linux User Tests Multiarch Linux User Tests
M: Alex Bennée <alex.bennee@linaro.org> M: Alex Bennée <alex.bennee@linaro.org>

15
tests/tcg/tricore/Makefile.softmmu-target Normal file
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@ -0,0 +1,15 @@
TESTS_PATH = $(SRC_PATH)/tests/tcg/tricore
LDFLAGS = -T$(TESTS_PATH)/link.ld
ASFLAGS =
QEMU_OPTS += -M tricore_testboard -nographic -kernel
%.pS: $(TESTS_PATH)/%.S
$(HOST_CC) -E -o $@ $<
%.o: %.pS
$(AS) $(ASFLAGS) -o $@ $<
%.tst: %.o
$(LD) $(LDFLAGS) $< -o $@

60
tests/tcg/tricore/link.ld Normal file
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@ -0,0 +1,60 @@
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-tricore")
OUTPUT_ARCH(tricore)
ENTRY(_start)
/* the internal ram description */
MEMORY
{
text_ram (rx!p): org = 0x80000000, len = 15K
data_ram (w!xp): org = 0xd0000000, len = 130K
}
/*
* Define the sizes of the user and system stacks.
*/
__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ;
/*
* Define the start address and the size of the context save area.
*/
__CSA_BEGIN = 0xd0000000 ;
__CSA_SIZE = 8k ;
__CSA_END = __CSA_BEGIN + __CSA_SIZE ;
SECTIONS
{
.text :
{
*(.text)
. = ALIGN(8);
} > text_ram
.rodata :
{
*(.rodata)
*(.rodata1)
} > data_ram
.data :
{
. = ALIGN(8) ;
*(.data)
*(.data.*)
. = ALIGN(8) ;
__USTACK = . + __USTACK_SIZE -768;
} > data_ram
/*
* Allocate space for BSS sections.
*/
.bss :
{
BSS_BASE = . ;
*(.bss)
*(COMMON)
. = ALIGN(8) ;
} > data_ram
/* Make sure CSA, stack and heap addresses are properly aligned. */
_. = ASSERT ((__CSA_BEGIN & 0x3f) == 0 , "illegal CSA start address") ;
_. = ASSERT ((__CSA_SIZE & 0x3f) == 0 , "illegal CSA size") ;
}