xen: fix interrupt routing
Compared to the last version I only added a comment to the code. - remove i440FX-xen and i440fx_write_config_xen we don't need to intercept pci config writes to i440FX anymore; - introduce PIIX3-xen and piix3_write_config_xen we do need to intercept pci config write to the PCI-ISA bridge to update the PCI link routing; - set the number of PIIX3-xen interrupts line to 128; Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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hw/pc.h
1
hw/pc.h
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@ -176,7 +176,6 @@ struct PCII440FXState;
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typedef struct PCII440FXState PCII440FXState;
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PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
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PCIBus *i440fx_xen_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq *pic, ram_addr_t ram_size);
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void i440fx_init_memory_mappings(PCII440FXState *d);
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/* piix4.c */
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@ -124,11 +124,7 @@ static void pc_init1(ram_addr_t ram_size,
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isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
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if (pci_enabled) {
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if (!xen_enabled()) {
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
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} else {
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pci_bus = i440fx_xen_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
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}
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
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} else {
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pci_bus = NULL;
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i440fx_state = NULL;
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@ -40,6 +40,7 @@ typedef PCIHostState I440FXState;
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#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
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#define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */
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#define XEN_PIIX_NUM_PIRQS 128ULL
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#define PIIX_PIRQC 0x60
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typedef struct PIIX3State {
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@ -78,6 +79,8 @@ struct PCII440FXState {
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#define I440FX_SMRAM 0x72
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static void piix3_set_irq(void *opaque, int pirq, int level);
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static void piix3_write_config_xen(PCIDevice *dev,
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uint32_t address, uint32_t val, int len);
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/* return the global irq number corresponding to a given device irq
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pin. We could also use the bus number to have a more precise
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@ -173,13 +176,6 @@ static void i440fx_write_config(PCIDevice *dev,
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}
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}
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static void i440fx_write_config_xen(PCIDevice *dev,
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uint32_t address, uint32_t val, int len)
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{
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xen_piix_pci_write_config_client(address, val, len);
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i440fx_write_config(dev, address, val, len);
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}
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static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id)
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{
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PCII440FXState *d = opaque;
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@ -267,8 +263,21 @@ static PCIBus *i440fx_common_init(const char *device_name,
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d = pci_create_simple(b, 0, device_name);
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*pi440fx_state = DO_UPCAST(PCII440FXState, dev, d);
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piix3 = DO_UPCAST(PIIX3State, dev,
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pci_create_simple_multifunction(b, -1, true, "PIIX3"));
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/* Xen supports additional interrupt routes from the PCI devices to
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* the IOAPIC: the four pins of each PCI device on the bus are also
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* connected to the IOAPIC directly.
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* These additional routes can be discovered through ACPI. */
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if (xen_enabled()) {
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piix3 = DO_UPCAST(PIIX3State, dev,
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pci_create_simple_multifunction(b, -1, true, "PIIX3-xen"));
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pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,
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piix3, XEN_PIIX_NUM_PIRQS);
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} else {
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piix3 = DO_UPCAST(PIIX3State, dev,
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pci_create_simple_multifunction(b, -1, true, "PIIX3"));
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pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3,
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PIIX_NUM_PIRQS);
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}
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piix3->pic = pic;
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(*pi440fx_state)->piix3 = piix3;
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@ -289,21 +298,6 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
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PCIBus *b;
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b = i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, pic, ram_size);
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pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, (*pi440fx_state)->piix3,
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PIIX_NUM_PIRQS);
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return b;
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}
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PCIBus *i440fx_xen_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
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qemu_irq *pic, ram_addr_t ram_size)
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{
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PCIBus *b;
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b = i440fx_common_init("i440FX-xen", pi440fx_state, piix3_devfn, pic, ram_size);
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pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,
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(*pi440fx_state)->piix3, PIIX_NUM_PIRQS);
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return b;
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}
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@ -365,6 +359,13 @@ static void piix3_write_config(PCIDevice *dev,
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}
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}
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static void piix3_write_config_xen(PCIDevice *dev,
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uint32_t address, uint32_t val, int len)
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{
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xen_piix_pci_write_config_client(address, val, len);
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piix3_write_config(dev, address, val, len);
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}
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static void piix3_reset(void *opaque)
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{
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PIIX3State *d = opaque;
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@ -464,14 +465,6 @@ static PCIDeviceInfo i440fx_info[] = {
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.no_hotplug = 1,
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.init = i440fx_initfn,
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.config_write = i440fx_write_config,
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},{
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.qdev.name = "i440FX-xen",
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.qdev.desc = "Host bridge",
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.qdev.size = sizeof(PCII440FXState),
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.qdev.vmsd = &vmstate_i440fx,
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.qdev.no_user = 1,
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.init = i440fx_initfn,
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.config_write = i440fx_write_config_xen,
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},{
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.qdev.name = "PIIX3",
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.qdev.desc = "ISA bridge",
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@ -481,6 +474,15 @@ static PCIDeviceInfo i440fx_info[] = {
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.no_hotplug = 1,
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.init = piix3_initfn,
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.config_write = piix3_write_config,
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},{
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.qdev.name = "PIIX3-xen",
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.qdev.desc = "ISA bridge",
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.qdev.size = sizeof(PIIX3State),
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.qdev.vmsd = &vmstate_piix3,
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.qdev.no_user = 1,
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.no_hotplug = 1,
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.init = piix3_initfn,
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.config_write = piix3_write_config_xen,
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},{
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/* end of list */
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}
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