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ioport: register ranges by byte aligned addresses always

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The I/O port space is byte addressable, even for word and long accesses.

An example is the VMware svga card, which has long ports on offsets 0,
1, and 2.

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity 2011-07-26 14:26:15 +03:00 committed by Anthony Liguori
parent 62152b8a01
commit bf3fb0e12a
1 changed files with 2 additions and 2 deletions
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4
ioport.c
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@ -146,7 +146,7 @@ int register_ioport_read(pio_addr_t start, int length, int size,
hw_error("register_ioport_read: invalid size");
return -1;
}
for(i = start; i < start + length; i += size) {
for(i = start; i < start + length; ++i) {
ioport_read_table[bsize][i] = func;
if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
hw_error("register_ioport_read: invalid opaque for address 0x%x",
@ -166,7 +166,7 @@ int register_ioport_write(pio_addr_t start, int length, int size,
hw_error("register_ioport_write: invalid size");
return -1;
}
for(i = start; i < start + length; i += size) {
for(i = start; i < start + length; ++i) {
ioport_write_table[bsize][i] = func;
if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
hw_error("register_ioport_write: invalid opaque for address 0x%x",