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target/arm: Adjust format test in scr_write 

Because reset always initializes the AA64 version, SCR_EL3,
test the mode of EL3 instead of the type of the cpreg.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220609214657.1217913-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-10 14:32:35 +01:00 committed by Peter Maydell
parent 284ad5e70c
commit bfe43e3d14
1 changed files with 8 additions and 6 deletions
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14
target/arm/helper.c
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@ -1738,12 +1738,14 @@ static void scr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
uint32_t valid_mask = 0x3fff;
ARMCPU *cpu = env_archcpu(env);
if (ri->state == ARM_CP_STATE_AA64) {
if (arm_feature(env, ARM_FEATURE_AARCH64) &&
!cpu_isar_feature(aa64_aa32_el1, cpu)) {
value |= SCR_FW | SCR_AW; /* these two bits are RES1. */
}
valid_mask &= ~SCR_NET;
/*
* Because SCR_EL3 is the "real" cpreg and SCR is the alias, reset always
* passes the reginfo for SCR_EL3, which has type ARM_CP_STATE_AA64.
* Instead, choose the format based on the mode of EL3.
*/
if (arm_el_is_aa64(env, 3)) {
value |= SCR_FW | SCR_AW; /* RES1 */
valid_mask &= ~SCR_NET; /* RES0 */
if (cpu_isar_feature(aa64_ras, cpu)) {
valid_mask |= SCR_TERR;