tcg-opc.h: Simplify insn_start def
We already have a TLADDR_ARGS definition, so rearrange the order slightly and use it in the definition of insn_start, instead of having an #ifdef. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1443788657-14537-2-git-send-email-james.hogan@imgtec.com>
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@ -173,18 +173,15 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64))
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DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64))
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DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64))
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#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2)
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#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
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/* QEMU specific */
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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DEF(insn_start, 0, 0, 2 * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
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#else
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DEF(insn_start, 0, 0, TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
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#endif
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DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS,
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TCG_OPF_NOT_PRESENT)
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DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END)
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DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END)
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#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2)
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#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
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DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1,
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TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 1,
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