apci: switch piix4 pci hotplug to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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c84649ca66
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c177684c75
@ -42,6 +42,9 @@
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#define GPE_BASE 0xafe0
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#define GPE_BASE 0xafe0
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#define GPE_LEN 4
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#define GPE_LEN 4
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#define PCI_HOTPLUG_ADDR 0xae00
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#define PCI_HOTPLUG_SIZE 0x000f
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#define PCI_UP_BASE 0xae00
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#define PCI_UP_BASE 0xae00
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#define PCI_DOWN_BASE 0xae04
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#define PCI_DOWN_BASE 0xae04
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#define PCI_EJ_BASE 0xae08
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#define PCI_EJ_BASE 0xae08
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@ -58,6 +61,7 @@ typedef struct PIIX4PMState {
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PCIDevice dev;
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PCIDevice dev;
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MemoryRegion io;
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MemoryRegion io;
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MemoryRegion io_gpe;
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MemoryRegion io_gpe;
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MemoryRegion io_pci;
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ACPIREGS ar;
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ACPIREGS ar;
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APMState apm;
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APMState apm;
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@ -574,6 +578,27 @@ static uint32_t pcirmv_read(void *opaque, uint32_t addr)
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return s->pci0_hotplug_enable;
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return s->pci0_hotplug_enable;
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}
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}
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static const MemoryRegionOps piix4_pci_ops = {
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.old_portio = (MemoryRegionPortio[]) {
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{
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.offset = PCI_UP_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4,
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.read = pci_up_read,
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},{
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.offset = PCI_DOWN_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4,
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.read = pci_down_read,
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},{
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.offset = PCI_EJ_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4,
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.read = pci_features_read,
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.write = pciej_write,
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},{
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.offset = PCI_RMV_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4,
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.read = pcirmv_read,
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},
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PORTIO_END_OF_LIST()
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},
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
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static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
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PCIHotplugState state);
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PCIHotplugState state);
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@ -583,14 +608,10 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
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GPE_LEN);
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GPE_LEN);
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memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe);
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memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe);
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register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s);
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memory_region_init_io(&s->io_pci, &piix4_pci_ops, s, "apci-pci-hotplug",
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register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s);
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PCI_HOTPLUG_SIZE);
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memory_region_add_subregion(get_system_io(), PCI_HOTPLUG_ADDR,
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register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, s);
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&s->io_pci);
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register_ioport_read(PCI_EJ_BASE, 4, 4, pci_features_read, s);
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register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s);
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pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
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pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
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}
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}
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