Enforce even float register pair for double register ops (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -90,7 +90,7 @@ enum {
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#ifdef TARGET_SPARC64
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#define DFPREG(r) (((r & 1) << 6) | (r & 0x1e))
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#else
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#define DFPREG(r) (r)
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#define DFPREG(r) (r & 0x1e)
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#endif
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#ifdef USE_DIRECT_JUMP
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