target/s390x: implement STORE PAIR TO QUADWORD

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <20170604202034.16615-3-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Aurelien Jarno 2017-06-04 22:20:33 +02:00 committed by Richard Henderson
parent e22dfdb28d
commit c21b610f58
4 changed files with 33 additions and 0 deletions

View File

@ -104,6 +104,7 @@ DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_2(stfle, i32, env, i64) DEF_HELPER_2(stfle, i32, env, i64)
DEF_HELPER_FLAGS_2(lpq, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_2(lpq, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_4(stpq, TCG_CALL_NO_WG, void, env, i64, i64, i64)
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64) DEF_HELPER_3(servc, i32, env, i64, i64)

View File

@ -796,6 +796,8 @@
/* STORE ACCESS MULTIPLE */ /* STORE ACCESS MULTIPLE */
C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0) C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0)
C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0) C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0)
/* STORE PAIR TO QUADWORD */
C(0xe38e, STPQ, RXY_a, Z, 0, a2, r1_P, 0, stpq, 0)
/* SUBTRACT */ /* SUBTRACT */
C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32) C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)

View File

@ -1692,6 +1692,30 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t addr)
return hi; return hi;
} }
/* store pair to quadword */
void HELPER(stpq)(CPUS390XState *env, uint64_t addr,
uint64_t low, uint64_t high)
{
uintptr_t ra = GETPC();
if (parallel_cpus) {
#ifndef CONFIG_ATOMIC128
cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
#else
int mem_idx = cpu_mmu_index(env, false);
TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
Int128 v = int128_make128(low, high);
helper_atomic_sto_be_mmu(env, addr, v, oi, ra);
#endif
} else {
check_alignment(env, addr, 16, ra);
cpu_stq_data_ra(env, addr + 0, high, ra);
cpu_stq_data_ra(env, addr + 8, low, ra);
}
}
/* Execute instruction. This instruction executes an insn modified with /* Execute instruction. This instruction executes an insn modified with
the contents of r1. It does not change the executed instruction in memory; the contents of r1. It does not change the executed instruction in memory;
it does not change the program counter. it does not change the program counter.

View File

@ -4203,6 +4203,12 @@ static ExitStatus op_stmh(DisasContext *s, DisasOps *o)
return NO_EXIT; return NO_EXIT;
} }
static ExitStatus op_stpq(DisasContext *s, DisasOps *o)
{
gen_helper_stpq(cpu_env, o->in2, o->out2, o->out);
return NO_EXIT;
}
static ExitStatus op_srst(DisasContext *s, DisasOps *o) static ExitStatus op_srst(DisasContext *s, DisasOps *o)
{ {
gen_helper_srst(o->in1, cpu_env, regs[0], o->in1, o->in2); gen_helper_srst(o->in1, cpu_env, regs[0], o->in1, o->in2);