target/s390x: implement STORE PAIR TO QUADWORD
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -104,6 +104,7 @@ DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64)
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DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_2(stfle, i32, env, i64)
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DEF_HELPER_2(stfle, i32, env, i64)
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DEF_HELPER_FLAGS_2(lpq, TCG_CALL_NO_WG, i64, env, i64)
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DEF_HELPER_FLAGS_2(lpq, TCG_CALL_NO_WG, i64, env, i64)
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DEF_HELPER_FLAGS_4(stpq, TCG_CALL_NO_WG, void, env, i64, i64, i64)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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DEF_HELPER_3(servc, i32, env, i64, i64)
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DEF_HELPER_3(servc, i32, env, i64, i64)
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@ -796,6 +796,8 @@
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/* STORE ACCESS MULTIPLE */
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/* STORE ACCESS MULTIPLE */
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C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0)
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C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0)
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C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0)
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C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0)
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/* STORE PAIR TO QUADWORD */
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C(0xe38e, STPQ, RXY_a, Z, 0, a2, r1_P, 0, stpq, 0)
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/* SUBTRACT */
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/* SUBTRACT */
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C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)
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C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)
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@ -1692,6 +1692,30 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t addr)
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return hi;
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return hi;
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}
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}
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/* store pair to quadword */
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void HELPER(stpq)(CPUS390XState *env, uint64_t addr,
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uint64_t low, uint64_t high)
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{
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uintptr_t ra = GETPC();
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if (parallel_cpus) {
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#ifndef CONFIG_ATOMIC128
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cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
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#else
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int mem_idx = cpu_mmu_index(env, false);
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TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
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Int128 v = int128_make128(low, high);
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helper_atomic_sto_be_mmu(env, addr, v, oi, ra);
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#endif
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} else {
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check_alignment(env, addr, 16, ra);
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cpu_stq_data_ra(env, addr + 0, high, ra);
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cpu_stq_data_ra(env, addr + 8, low, ra);
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}
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}
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/* Execute instruction. This instruction executes an insn modified with
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/* Execute instruction. This instruction executes an insn modified with
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the contents of r1. It does not change the executed instruction in memory;
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the contents of r1. It does not change the executed instruction in memory;
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it does not change the program counter.
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it does not change the program counter.
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@ -4203,6 +4203,12 @@ static ExitStatus op_stmh(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_stpq(DisasContext *s, DisasOps *o)
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{
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gen_helper_stpq(cpu_env, o->in2, o->out2, o->out);
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return NO_EXIT;
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}
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static ExitStatus op_srst(DisasContext *s, DisasOps *o)
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static ExitStatus op_srst(DisasContext *s, DisasOps *o)
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{
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{
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gen_helper_srst(o->in1, cpu_env, regs[0], o->in1, o->in2);
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gen_helper_srst(o->in1, cpu_env, regs[0], o->in1, o->in2);
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