target-tilegx: Handle unconditional jump instructions
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -249,7 +249,7 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
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const char *mnemonic;
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const char *mnemonic;
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TCGMemOp memop;
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TCGMemOp memop;
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/* Eliminate nops before doing anything else. */
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/* Eliminate nops and jumps before doing anything else. */
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switch (opext) {
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switch (opext) {
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case OE_RR_Y0(NOP):
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case OE_RR_Y0(NOP):
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case OE_RR_Y1(NOP):
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case OE_RR_Y1(NOP):
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@ -268,6 +268,31 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
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}
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}
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s", mnemonic);
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s", mnemonic);
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return TILEGX_EXCP_NONE;
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return TILEGX_EXCP_NONE;
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case OE_RR_X1(JRP):
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case OE_RR_Y1(JRP):
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mnemonic = "jrp";
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goto do_jr;
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case OE_RR_X1(JR):
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case OE_RR_Y1(JR):
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mnemonic = "jr";
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goto do_jr;
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case OE_RR_X1(JALRP):
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case OE_RR_Y1(JALRP):
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mnemonic = "jalrp";
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goto do_jalr;
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case OE_RR_X1(JALR):
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case OE_RR_Y1(JALR):
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mnemonic = "jalr";
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do_jalr:
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tcg_gen_movi_tl(dest_gr(dc, TILEGX_R_LR),
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dc->pc + TILEGX_BUNDLE_SIZE_IN_BYTES);
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do_jr:
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dc->jmp.cond = TCG_COND_ALWAYS;
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dc->jmp.dest = tcg_temp_new();
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tcg_gen_andi_tl(dc->jmp.dest, load_gr(dc, srca), ~7);
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s %s", mnemonic, reg_names[srca]);
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return TILEGX_EXCP_NONE;
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}
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}
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tdest = dest_gr(dc, dest);
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tdest = dest_gr(dc, dest);
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@ -296,14 +321,6 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
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case OE_RR_Y1(ILL):
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case OE_RR_Y1(ILL):
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case OE_RR_X1(INV):
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case OE_RR_X1(INV):
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case OE_RR_X1(IRET):
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case OE_RR_X1(IRET):
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case OE_RR_X1(JALRP):
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case OE_RR_Y1(JALRP):
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case OE_RR_X1(JALR):
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case OE_RR_Y1(JALR):
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case OE_RR_X1(JRP):
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case OE_RR_Y1(JRP):
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case OE_RR_X1(JR):
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case OE_RR_Y1(JR):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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case OE_RR_X1(LD1S):
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case OE_RR_X1(LD1S):
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memop = MO_SB;
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memop = MO_SB;
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@ -370,6 +387,12 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
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break;
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break;
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case OE_RR_X1(LNK):
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case OE_RR_X1(LNK):
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case OE_RR_Y1(LNK):
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case OE_RR_Y1(LNK):
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if (srca) {
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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}
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tcg_gen_movi_tl(tdest, dc->pc + TILEGX_BUNDLE_SIZE_IN_BYTES);
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mnemonic = "lnk";
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break;
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case OE_RR_X1(MF):
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case OE_RR_X1(MF):
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case OE_RR_X1(NAP):
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case OE_RR_X1(NAP):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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@ -1094,18 +1117,19 @@ static TileExcp gen_branch_opcode_x1(DisasContext *dc, unsigned ext,
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return TILEGX_EXCP_NONE;
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return TILEGX_EXCP_NONE;
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}
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}
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static TileExcp gen_jump_opcode_x1(DisasContext *dc, unsigned ext,
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static TileExcp gen_jump_opcode_x1(DisasContext *dc, unsigned ext, int off)
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int off)
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{
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{
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target_ulong tgt = dc->pc + off * TILEGX_BUNDLE_SIZE_IN_BYTES;
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target_ulong tgt = dc->pc + off * TILEGX_BUNDLE_SIZE_IN_BYTES;
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const char *mnemonic;
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const char *mnemonic = "j";
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switch (ext) {
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/* The extension field is 1 bit, therefore we only have JAL and J. */
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case JAL_JUMP_OPCODE_X1:
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if (ext == JAL_JUMP_OPCODE_X1) {
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case J_JUMP_OPCODE_X1:
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tcg_gen_movi_tl(dest_gr(dc, TILEGX_R_LR),
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default:
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dc->pc + TILEGX_BUNDLE_SIZE_IN_BYTES);
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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mnemonic = "jal";
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}
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}
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dc->jmp.cond = TCG_COND_ALWAYS;
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dc->jmp.dest = tcg_const_tl(tgt);
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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qemu_log("%s " TARGET_FMT_lx " <%s>",
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qemu_log("%s " TARGET_FMT_lx " <%s>",
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