arm/translate-a64: add all single op FP16 to handle_fp_1src_half
This includes FMOV, FABS, FNEG, FSQRT and FRINT[NPMZAXI]. We re-use existing helpers to achieve this. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180227143852.11175-32-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -4596,6 +4596,65 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn)
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tcg_temp_free_i64(t_true);
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}
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/* Floating-point data-processing (1 source) - half precision */
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static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn)
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{
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TCGv_ptr fpst = NULL;
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TCGv_i32 tcg_op = tcg_temp_new_i32();
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TCGv_i32 tcg_res = tcg_temp_new_i32();
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read_vec_element_i32(s, tcg_op, rn, 0, MO_16);
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switch (opcode) {
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case 0x0: /* FMOV */
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tcg_gen_mov_i32(tcg_res, tcg_op);
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break;
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case 0x1: /* FABS */
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tcg_gen_andi_i32(tcg_res, tcg_op, 0x7fff);
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break;
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case 0x2: /* FNEG */
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tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
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break;
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case 0x3: /* FSQRT */
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gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env);
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break;
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case 0x8: /* FRINTN */
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case 0x9: /* FRINTP */
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case 0xa: /* FRINTM */
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case 0xb: /* FRINTZ */
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case 0xc: /* FRINTA */
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{
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TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
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fpst = get_fpstatus_ptr(true);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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tcg_temp_free_i32(tcg_rmode);
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break;
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}
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case 0xe: /* FRINTX */
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fpst = get_fpstatus_ptr(true);
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gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, fpst);
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break;
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case 0xf: /* FRINTI */
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fpst = get_fpstatus_ptr(true);
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gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
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break;
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default:
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abort();
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}
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write_fp_sreg(s, rd, tcg_res);
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if (fpst) {
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tcg_temp_free_ptr(fpst);
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}
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tcg_temp_free_i32(tcg_op);
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tcg_temp_free_i32(tcg_res);
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}
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/* Floating-point data-processing (1 source) - single precision */
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static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
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{
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@ -4825,6 +4884,18 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
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handle_fp_1src_double(s, opcode, rd, rn);
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break;
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case 3:
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if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
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unallocated_encoding(s);
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return;
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}
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if (!fp_access_check(s)) {
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return;
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}
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handle_fp_1src_half(s, opcode, rd, rn);
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break;
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default:
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unallocated_encoding(s);
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}
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