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hw/i386: Make pic a property of common x86 base machine type

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Legacy PIC (8259) cannot be supported for TDX guests since TDX module
doesn't allow directly interrupt injection.  Using posted interrupts
for the PIC is not a viable option as the guest BIOS/kernel will not
do EOI for PIC IRQs, i.e. will leave the vIRR bit set.

Make PIC the property of common x86 machine type. Hence all x86
machines, including microvm, can disable it.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Sergio Lopez <slp@redhat.com>
Message-Id: <20220310122811.807794-3-xiaoyao.li@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Xiaoyao Li 2022-03-10 20:28:11 +08:00 committed by Michael S. Tsirkin
parent 9dee7e5109
commit c300bbe8d2
6 changed files with 34 additions and 30 deletions
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27
hw/i386/microvm.c
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@ -247,7 +247,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
x86ms->pci_irq_mask = 0;
}
if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
qemu_irq *i8259;
i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
@ -491,23 +491,6 @@ static void microvm_machine_reset(MachineState *machine)
}
}
static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
MicrovmMachineState *mms = MICROVM_MACHINE(obj);
OnOffAuto pic = mms->pic;
visit_type_OnOffAuto(v, name, &pic, errp);
}
static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
MicrovmMachineState *mms = MICROVM_MACHINE(obj);
visit_type_OnOffAuto(v, name, &mms->pic, errp);
}
static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
@ -632,7 +615,6 @@ static void microvm_machine_initfn(Object *obj)
MicrovmMachineState *mms = MICROVM_MACHINE(obj);
/* Configuration */
mms->pic = ON_OFF_AUTO_AUTO;
mms->rtc = ON_OFF_AUTO_AUTO;
mms->pcie = ON_OFF_AUTO_AUTO;
mms->ioapic2 = ON_OFF_AUTO_AUTO;
@ -684,13 +666,6 @@ static void microvm_class_init(ObjectClass *oc, void *data)
x86mc->fwcfg_dma_enabled = true;
object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto",
microvm_machine_get_pic,
microvm_machine_set_pic,
NULL, NULL);
object_class_property_set_description(oc, MICROVM_MACHINE_PIC,
"Enable i8259 PIC");
object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
microvm_machine_get_rtc,
microvm_machine_set_rtc,

4
hw/i386/pc_piix.c
View File

@ -218,7 +218,9 @@ static void pc_init1(MachineState *machine,
}
isa_bus_irqs(isa_bus, x86ms->gsi);
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
}
if (pcmc->pci_enabled) {
ioapic_init_gsi(gsi_state, "i440fx");

4
hw/i386/pc_q35.c
View File

@ -265,7 +265,9 @@ static void pc_q35_init(MachineState *machine)
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
isa_bus = ich9_lpc->isa_bus;
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
}
if (pcmc->pci_enabled) {
ioapic_init_gsi(gsi_state, "q35");

25
hw/i386/x86.c
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@ -1261,6 +1261,23 @@ static void x86_machine_set_pit(Object *obj, Visitor *v, const char *name,
visit_type_OnOffAuto(v, name, &x86ms->pit, errp);
}
static void x86_machine_get_pic(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
X86MachineState *x86ms = X86_MACHINE(obj);
OnOffAuto pic = x86ms->pic;
visit_type_OnOffAuto(v, name, &pic, errp);
}
static void x86_machine_set_pic(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
X86MachineState *x86ms = X86_MACHINE(obj);
visit_type_OnOffAuto(v, name, &x86ms->pic, errp);
}
static char *x86_machine_get_oem_id(Object *obj, Error **errp)
{
X86MachineState *x86ms = X86_MACHINE(obj);
@ -1351,6 +1368,7 @@ static void x86_machine_initfn(Object *obj)
x86ms->smm = ON_OFF_AUTO_AUTO;
x86ms->acpi = ON_OFF_AUTO_AUTO;
x86ms->pit = ON_OFF_AUTO_AUTO;
x86ms->pic = ON_OFF_AUTO_AUTO;
x86ms->pci_irq_mask = ACPI_BUILD_PCI_IRQS;
x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
@ -1389,6 +1407,13 @@ static void x86_machine_class_init(ObjectClass *oc, void *data)
object_class_property_set_description(oc, X86_MACHINE_PIT,
"Enable i8254 PIT");
object_class_property_add(oc, X86_MACHINE_PIC, "OnOffAuto",
x86_machine_get_pic,
x86_machine_set_pic,
NULL, NULL);
object_class_property_set_description(oc, X86_MACHINE_PIC,
"Enable i8259 PIC");
object_class_property_add_str(oc, X86_MACHINE_OEM_ID,
x86_machine_get_oem_id,
x86_machine_set_oem_id);

2
include/hw/i386/microvm.h
View File

@ -67,7 +67,6 @@
#define PCIE_ECAM_SIZE 0x10000000
/* Machine type options */
#define MICROVM_MACHINE_PIC "pic"
#define MICROVM_MACHINE_RTC "rtc"
#define MICROVM_MACHINE_PCIE "pcie"
#define MICROVM_MACHINE_IOAPIC2 "ioapic2"
@ -85,7 +84,6 @@ struct MicrovmMachineState {
X86MachineState parent;
/* Machine type options */
OnOffAuto pic;
OnOffAuto rtc;
OnOffAuto pcie;
OnOffAuto ioapic2;

2
include/hw/i386/x86.h
View File

@ -66,6 +66,7 @@ struct X86MachineState {
OnOffAuto smm;
OnOffAuto acpi;
OnOffAuto pit;
OnOffAuto pic;
char *oem_id;
char *oem_table_id;
@ -86,6 +87,7 @@ struct X86MachineState {
#define X86_MACHINE_SMM "smm"
#define X86_MACHINE_ACPI "acpi"
#define X86_MACHINE_PIT "pit"
#define X86_MACHINE_PIC "pic"
#define X86_MACHINE_OEM_ID "x-oem-id"
#define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id"
#define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit"