From c36b2f1a4d036dc105018c1af3f127a4d3333789 Mon Sep 17 00:00:00 2001 From: Frank Chang Date: Fri, 10 Dec 2021 15:55:50 +0800 Subject: [PATCH] target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty Signed-off-by: Frank Chang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20211210075704.23951-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 9b5bd5d7b4..bb500afdeb 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -502,6 +502,7 @@ static RISCVException read_mhartid(CPURISCVState *env, int csrno, static uint64_t add_status_sd(RISCVMXL xl, uint64_t status) { if ((status & MSTATUS_FS) == MSTATUS_FS || + (status & MSTATUS_VS) == MSTATUS_VS || (status & MSTATUS_XS) == MSTATUS_XS) { switch (xl) { case MXL_RV32: