target-s390: Convert SPT, STPT
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -89,7 +89,7 @@ DEF_HELPER_2(stcke, i32, env, i64)
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DEF_HELPER_FLAGS_2(sckc, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_1(stckc, TCG_CALL_NO_RWG, i64, env)
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DEF_HELPER_FLAGS_2(spt, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_2(stpt, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_1(stpt, TCG_CALL_NO_RWG, i64, env)
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DEF_HELPER_4(stsi, i32, env, i64, i32, i32)
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DEF_HELPER_4(lctl, void, env, i32, i64, i32)
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DEF_HELPER_4(lctlg, void, env, i32, i64, i32)
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@ -638,6 +638,8 @@
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C(0xb204, SCK, S, Z, 0, 0, 0, 0, 0, 0)
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/* SET CLOCK COMPARATOR */
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C(0xb206, SCKC, S, Z, 0, m2_64, 0, 0, sckc, 0)
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/* SET CPU TIMER */
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C(0xb208, SPT, S, Z, 0, m2_64, 0, 0, spt, 0)
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/* SET SYSTEM MASK */
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C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0)
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/* SIGNAL PROCESSOR */
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@ -652,6 +654,8 @@
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C(0xeb25, STCTG, RSY_a, Z, 0, a2, 0, 0, stctg, 0)
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/* STORE CPU ID */
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C(0xb202, STIDP, S, Z, la2, 0, new, m1_64, stidp, 0)
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/* STORE CPU TIMER */
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C(0xb209, STPT, S, Z, la2, 0, new, m1_64, stpt, 0)
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/* STORE THEN AND SYSTEM MASK */
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C(0xac00, STNSM, SI, Z, la1, 0, 0, 0, stnosm, 0)
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/* STORE THEN OR SYSTEM MASK */
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@ -196,10 +196,8 @@ uint64_t HELPER(stckc)(CPUS390XState *env)
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}
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/* Set CPU Timer */
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void HELPER(spt)(CPUS390XState *env, uint64_t a1)
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void HELPER(spt)(CPUS390XState *env, uint64_t time)
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{
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uint64_t time = cpu_ldq_data(env, a1);
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if (time == -1ULL) {
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return;
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}
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@ -211,10 +209,10 @@ void HELPER(spt)(CPUS390XState *env, uint64_t a1)
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}
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/* Store CPU Timer */
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void HELPER(stpt)(CPUS390XState *env, uint64_t a1)
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uint64_t HELPER(stpt)(CPUS390XState *env)
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{
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/* XXX implement */
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cpu_stq_data(env, a1, 0);
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return 0;
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}
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/* Store System Information */
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@ -1033,24 +1033,6 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
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LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
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switch (op) {
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case 0x08: /* SPT D2(B2) [S] */
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/* Set CPU Timer */
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check_privileged(s);
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decode_rs(s, insn, &r1, &r3, &b2, &d2);
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tmp = get_address(s, 0, b2, d2);
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potential_page_fault(s);
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gen_helper_spt(cpu_env, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0x09: /* STPT D2(B2) [S] */
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/* Store CPU Timer */
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check_privileged(s);
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decode_rs(s, insn, &r1, &r3, &b2, &d2);
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tmp = get_address(s, 0, b2, d2);
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potential_page_fault(s);
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gen_helper_stpt(cpu_env, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0x0a: /* SPKA D2(B2) [S] */
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/* Set PSW Key from Address */
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check_privileged(s);
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@ -2950,6 +2932,20 @@ static ExitStatus op_stidp(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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}
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static ExitStatus op_spt(DisasContext *s, DisasOps *o)
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{
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check_privileged(s);
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gen_helper_spt(cpu_env, o->in2);
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return NO_EXIT;
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}
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static ExitStatus op_stpt(DisasContext *s, DisasOps *o)
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{
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check_privileged(s);
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gen_helper_stpt(o->out, cpu_env);
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return NO_EXIT;
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}
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static ExitStatus op_stnosm(DisasContext *s, DisasOps *o)
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{
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uint64_t i2 = get_field(s->fields, i2);
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