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MIPS patches 2016-09-29 

Changes:
 * MIPS Maintainer update
 * vmstateify rc4030
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Merge remote-tracking branch 'remotes/yongbok/tags/mips-20160929' into staging

MIPS patches 2016-09-29

Changes:
* MIPS Maintainer update
* vmstateify rc4030

# gpg: Signature made Thu 29 Sep 2016 13:09:09 BST
# gpg:                using RSA key 0x2238EB86D5F797C2
# gpg: Good signature from "Yongbok Kim <yongbok.kim@imgtec.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 8600 4CF5 3415 A5D9 4CFA  2B5C 2238 EB86 D5F7 97C2

* remotes/yongbok/tags/mips-20160929:
  hw/dma: vmstateify rc4030
  MAINTAINERS: update target-mips maintainers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2016-09-30 23:14:39 +01:00
parent 49540a1f65 73bfa8c0e0
commit c69e3cef21
2 changed files with 28 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MAINTAINERS
View File

@ -145,7 +145,7 @@ F: disas/microblaze.c
MIPS
M: Aurelien Jarno <aurelien@aurel32.net>
M: Leon Alrae <leon.alrae@imgtec.com>
M: Yongbok Kim <yongbok.kim@imgtec.com>
S: Maintained
F: target-mips/
F: hw/mips/

81
hw/dma/rc4030.c
View File

@ -616,34 +616,9 @@ static void rc4030_reset(DeviceState *dev)
qemu_irq_lower(s->jazz_bus_irq);
}
static int rc4030_load(QEMUFile *f, void *opaque, int version_id)
static int rc4030_post_load(void *opaque, int version_id)
{
rc4030State* s = opaque;
int i, j;
if (version_id != 2)
return -EINVAL;
s->config = qemu_get_be32(f);
s->invalid_address_register = qemu_get_be32(f);
for (i = 0; i < 8; i++)
for (j = 0; j < 4; j++)
s->dma_regs[i][j] = qemu_get_be32(f);
s->dma_tl_base = qemu_get_be32(f);
s->dma_tl_limit = qemu_get_be32(f);
s->cache_maint = qemu_get_be32(f);
s->remote_failed_address = qemu_get_be32(f);
s->memory_failed_address = qemu_get_be32(f);
s->cache_ptag = qemu_get_be32(f);
s->cache_ltag = qemu_get_be32(f);
s->cache_bmask = qemu_get_be32(f);
s->memory_refresh_rate = qemu_get_be32(f);
s->nvram_protect = qemu_get_be32(f);
for (i = 0; i < 15; i++)
s->rem_speed[i] = qemu_get_be32(f);
s->imr_jazz = qemu_get_be32(f);
s->isr_jazz = qemu_get_be32(f);
s->itr = qemu_get_be32(f);
set_next_tick(s);
update_jazz_irq(s);
@ -651,32 +626,31 @@ static int rc4030_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
static void rc4030_save(QEMUFile *f, void *opaque)
{
rc4030State* s = opaque;
int i, j;
qemu_put_be32(f, s->config);
qemu_put_be32(f, s->invalid_address_register);
for (i = 0; i < 8; i++)
for (j = 0; j < 4; j++)
qemu_put_be32(f, s->dma_regs[i][j]);
qemu_put_be32(f, s->dma_tl_base);
qemu_put_be32(f, s->dma_tl_limit);
qemu_put_be32(f, s->cache_maint);
qemu_put_be32(f, s->remote_failed_address);
qemu_put_be32(f, s->memory_failed_address);
qemu_put_be32(f, s->cache_ptag);
qemu_put_be32(f, s->cache_ltag);
qemu_put_be32(f, s->cache_bmask);
qemu_put_be32(f, s->memory_refresh_rate);
qemu_put_be32(f, s->nvram_protect);
for (i = 0; i < 15; i++)
qemu_put_be32(f, s->rem_speed[i]);
qemu_put_be32(f, s->imr_jazz);
qemu_put_be32(f, s->isr_jazz);
qemu_put_be32(f, s->itr);
}
static const VMStateDescription vmstate_rc4030 = {
.name = "rc4030",
.version_id = 3,
.post_load = rc4030_post_load,
.fields = (VMStateField []) {
VMSTATE_UINT32(config, rc4030State),
VMSTATE_UINT32(invalid_address_register, rc4030State),
VMSTATE_UINT32_2DARRAY(dma_regs, rc4030State, 8, 4),
VMSTATE_UINT32(dma_tl_base, rc4030State),
VMSTATE_UINT32(dma_tl_limit, rc4030State),
VMSTATE_UINT32(cache_maint, rc4030State),
VMSTATE_UINT32(remote_failed_address, rc4030State),
VMSTATE_UINT32(memory_failed_address, rc4030State),
VMSTATE_UINT32(cache_ptag, rc4030State),
VMSTATE_UINT32(cache_ltag, rc4030State),
VMSTATE_UINT32(cache_bmask, rc4030State),
VMSTATE_UINT32(memory_refresh_rate, rc4030State),
VMSTATE_UINT32(nvram_protect, rc4030State),
VMSTATE_UINT32_ARRAY(rem_speed, rc4030State, 16),
VMSTATE_UINT32(imr_jazz, rc4030State),
VMSTATE_UINT32(isr_jazz, rc4030State),
VMSTATE_UINT32(itr, rc4030State),
VMSTATE_END_OF_LIST()
}
};
static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write)
{
@ -753,8 +727,6 @@ static void rc4030_initfn(Object *obj)
sysbus_init_irq(sysbus, &s->timer_irq);
sysbus_init_irq(sysbus, &s->jazz_bus_irq);
register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
sysbus_init_mmio(sysbus, &s->iomem_chipset);
sysbus_init_mmio(sysbus, &s->iomem_jazzio);
}
@ -813,6 +785,7 @@ static void rc4030_class_init(ObjectClass *klass, void *class_data)
dc->realize = rc4030_realize;
dc->unrealize = rc4030_unrealize;
dc->reset = rc4030_reset;
dc->vmsd = &vmstate_rc4030;
}
static const TypeInfo rc4030_info = {