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mem/cxl_type3: fix GPF DVSEC

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The structure is for device dvsec not port dvsec. Change type to fix
this issue.

Signed-off-by: Tong Zhang <t.zhang2@samsung.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220915175853.2902-1-t.zhang2@samsung.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Tong Zhang 2022-09-15 17:59:04 +00:00 committed by Laurent Vivier
parent fcf5813cba
commit c6cc866c0e
1 changed files with 1 additions and 1 deletions
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2
hw/mem/cxl_type3.c
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@ -49,7 +49,7 @@ static void build_dvsecs(CXLType3Dev *ct3d)
.phase2_power = 0x33, /* 0x33 miliwatts */
};
cxl_component_create_dvsec(cxl_cstate, CXL2_TYPE3_DEVICE,
GPF_DEVICE_DVSEC_LENGTH, GPF_PORT_DVSEC,
GPF_DEVICE_DVSEC_LENGTH, GPF_DEVICE_DVSEC,
GPF_DEVICE_DVSEC_REVID, dvsec);
}