softmmu: move all load/store functions to cpu_ldst.h
Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
f08b617018
commit
c773828aa9
@ -198,127 +198,8 @@ extern unsigned long reserved_va;
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#define RESERVED_VA 0ul
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#endif
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define h2g_valid(x) 1
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#else
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#define h2g_valid(x) ({ \
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unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
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(__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
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(!RESERVED_VA || (__guest < RESERVED_VA)); \
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})
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#endif
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
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(abi_ulong)__ret; \
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})
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#define h2g(x) ({ \
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/* Check if given address fits target address space */ \
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assert(h2g_valid(x)); \
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h2g_nocheck(x); \
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})
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#define saddr(x) g2h(x)
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#define laddr(x) g2h(x)
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#else /* !CONFIG_USER_ONLY */
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/* NOTE: we use double casts if pointers and target_ulong have
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different sizes */
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#define saddr(x) (uint8_t *)(intptr_t)(x)
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#define laddr(x) (uint8_t *)(intptr_t)(x)
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#endif
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#define ldub_raw(p) ldub_p(laddr((p)))
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#define ldsb_raw(p) ldsb_p(laddr((p)))
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#define lduw_raw(p) lduw_p(laddr((p)))
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#define ldsw_raw(p) ldsw_p(laddr((p)))
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#define ldl_raw(p) ldl_p(laddr((p)))
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#define ldq_raw(p) ldq_p(laddr((p)))
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#define ldfl_raw(p) ldfl_p(laddr((p)))
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#define ldfq_raw(p) ldfq_p(laddr((p)))
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#define stb_raw(p, v) stb_p(saddr((p)), v)
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#define stw_raw(p, v) stw_p(saddr((p)), v)
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#define stl_raw(p, v) stl_p(saddr((p)), v)
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#define stq_raw(p, v) stq_p(saddr((p)), v)
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#define stfl_raw(p, v) stfl_p(saddr((p)), v)
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#define stfq_raw(p, v) stfq_p(saddr((p)), v)
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#if defined(CONFIG_USER_ONLY)
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/* if user mode, no other memory access functions */
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#define ldub(p) ldub_raw(p)
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#define ldsb(p) ldsb_raw(p)
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#define lduw(p) lduw_raw(p)
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#define ldsw(p) ldsw_raw(p)
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#define ldl(p) ldl_raw(p)
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#define ldq(p) ldq_raw(p)
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#define ldfl(p) ldfl_raw(p)
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#define ldfq(p) ldfq_raw(p)
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#define stb(p, v) stb_raw(p, v)
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#define stw(p, v) stw_raw(p, v)
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#define stl(p, v) stl_raw(p, v)
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#define stq(p, v) stq_raw(p, v)
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#define stfl(p, v) stfl_raw(p, v)
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#define stfq(p, v) stfq_raw(p, v)
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#define cpu_ldub_code(env1, p) ldub_raw(p)
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#define cpu_ldsb_code(env1, p) ldsb_raw(p)
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#define cpu_lduw_code(env1, p) lduw_raw(p)
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#define cpu_ldsw_code(env1, p) ldsw_raw(p)
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#define cpu_ldl_code(env1, p) ldl_raw(p)
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#define cpu_ldq_code(env1, p) ldq_raw(p)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldsw_data(env, addr) ldsw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_ldq_data(env, addr) ldq_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_data(env, addr, data) stq_raw(addr, data)
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#define cpu_ldub_kernel(env, addr) ldub_raw(addr)
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#define cpu_lduw_kernel(env, addr) lduw_raw(addr)
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#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
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#define cpu_ldl_kernel(env, addr) ldl_raw(addr)
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#define cpu_ldq_kernel(env, addr) ldq_raw(addr)
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#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
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#define ldub_kernel(p) ldub_raw(p)
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#define ldsb_kernel(p) ldsb_raw(p)
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#define lduw_kernel(p) lduw_raw(p)
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#define ldsw_kernel(p) ldsw_raw(p)
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#define ldl_kernel(p) ldl_raw(p)
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#define ldq_kernel(p) ldq_raw(p)
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#define ldfl_kernel(p) ldfl_raw(p)
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#define ldfq_kernel(p) ldfq_raw(p)
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#define stb_kernel(p, v) stb_raw(p, v)
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#define stw_kernel(p, v) stw_raw(p, v)
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#define stl_kernel(p, v) stl_raw(p, v)
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#define stq_kernel(p, v) stq_raw(p, v)
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#define stfl_kernel(p, v) stfl_raw(p, v)
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#define stfq_kernel(p, vt) stfq_raw(p, v)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#endif /* defined(CONFIG_USER_ONLY) */
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/* page related stuff */
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#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
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@ -28,8 +28,373 @@
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#ifndef CPU_LDST_H
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#define CPU_LDST_H
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#if !defined(CONFIG_USER_ONLY)
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#include "exec/softmmu_exec.h"
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#if defined(CONFIG_USER_ONLY)
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define h2g_valid(x) 1
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#else
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#define h2g_valid(x) ({ \
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unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
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(__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
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(!RESERVED_VA || (__guest < RESERVED_VA)); \
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})
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#endif
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
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(abi_ulong)__ret; \
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})
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#define h2g(x) ({ \
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/* Check if given address fits target address space */ \
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assert(h2g_valid(x)); \
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h2g_nocheck(x); \
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})
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#define saddr(x) g2h(x)
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#define laddr(x) g2h(x)
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#else /* !CONFIG_USER_ONLY */
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/* NOTE: we use double casts if pointers and target_ulong have
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different sizes */
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#define saddr(x) (uint8_t *)(intptr_t)(x)
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#define laddr(x) (uint8_t *)(intptr_t)(x)
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#endif
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#define ldub_raw(p) ldub_p(laddr((p)))
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#define ldsb_raw(p) ldsb_p(laddr((p)))
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#define lduw_raw(p) lduw_p(laddr((p)))
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#define ldsw_raw(p) ldsw_p(laddr((p)))
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#define ldl_raw(p) ldl_p(laddr((p)))
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#define ldq_raw(p) ldq_p(laddr((p)))
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#define ldfl_raw(p) ldfl_p(laddr((p)))
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#define ldfq_raw(p) ldfq_p(laddr((p)))
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#define stb_raw(p, v) stb_p(saddr((p)), v)
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#define stw_raw(p, v) stw_p(saddr((p)), v)
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#define stl_raw(p, v) stl_p(saddr((p)), v)
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#define stq_raw(p, v) stq_p(saddr((p)), v)
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#define stfl_raw(p, v) stfl_p(saddr((p)), v)
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#define stfq_raw(p, v) stfq_p(saddr((p)), v)
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#if defined(CONFIG_USER_ONLY)
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/* if user mode, no other memory access functions */
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#define ldub(p) ldub_raw(p)
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#define ldsb(p) ldsb_raw(p)
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#define lduw(p) lduw_raw(p)
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#define ldsw(p) ldsw_raw(p)
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#define ldl(p) ldl_raw(p)
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#define ldq(p) ldq_raw(p)
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#define ldfl(p) ldfl_raw(p)
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#define ldfq(p) ldfq_raw(p)
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#define stb(p, v) stb_raw(p, v)
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#define stw(p, v) stw_raw(p, v)
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#define stl(p, v) stl_raw(p, v)
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#define stq(p, v) stq_raw(p, v)
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#define stfl(p, v) stfl_raw(p, v)
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#define stfq(p, v) stfq_raw(p, v)
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#define cpu_ldub_code(env1, p) ldub_raw(p)
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#define cpu_ldsb_code(env1, p) ldsb_raw(p)
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#define cpu_lduw_code(env1, p) lduw_raw(p)
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#define cpu_ldsw_code(env1, p) ldsw_raw(p)
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#define cpu_ldl_code(env1, p) ldl_raw(p)
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#define cpu_ldq_code(env1, p) ldq_raw(p)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldsw_data(env, addr) ldsw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_ldq_data(env, addr) ldq_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_data(env, addr, data) stq_raw(addr, data)
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#define cpu_ldub_kernel(env, addr) ldub_raw(addr)
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#define cpu_lduw_kernel(env, addr) lduw_raw(addr)
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#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
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#define cpu_ldl_kernel(env, addr) ldl_raw(addr)
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#define cpu_ldq_kernel(env, addr) ldq_raw(addr)
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#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
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#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
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#define ldub_kernel(p) ldub_raw(p)
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#define ldsb_kernel(p) ldsb_raw(p)
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#define lduw_kernel(p) lduw_raw(p)
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#define ldsw_kernel(p) ldsw_raw(p)
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#define ldl_kernel(p) ldl_raw(p)
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#define ldq_kernel(p) ldq_raw(p)
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#define ldfl_kernel(p) ldfl_raw(p)
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#define ldfq_kernel(p) ldfq_raw(p)
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#define stb_kernel(p, v) stb_raw(p, v)
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#define stw_kernel(p, v) stw_raw(p, v)
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#define stl_kernel(p, v) stl_raw(p, v)
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#define stq_kernel(p, v) stq_raw(p, v)
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#define stfl_kernel(p, v) stfl_raw(p, v)
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#define stfq_kernel(p, vt) stfq_raw(p, v)
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#define cpu_ldub_data(env, addr) ldub_raw(addr)
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#define cpu_lduw_data(env, addr) lduw_raw(addr)
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#define cpu_ldl_data(env, addr) ldl_raw(addr)
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#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
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#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
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#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
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#else
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/* XXX: find something cleaner.
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* Furthermore, this is false for 64 bits targets
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*/
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#define ldul_user ldl_user
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#define ldul_kernel ldl_kernel
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#define ldul_hypv ldl_hypv
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#define ldul_executive ldl_executive
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#define ldul_supervisor ldl_supervisor
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/* The memory helpers for tcg-generated code need tcg_target_long etc. */
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#include "tcg.h"
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uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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void helper_stb_mmu(CPUArchState *env, target_ulong addr,
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uint8_t val, int mmu_idx);
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void helper_stw_mmu(CPUArchState *env, target_ulong addr,
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uint16_t val, int mmu_idx);
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void helper_stl_mmu(CPUArchState *env, target_ulong addr,
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uint32_t val, int mmu_idx);
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void helper_stq_mmu(CPUArchState *env, target_ulong addr,
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uint64_t val, int mmu_idx);
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uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
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#define CPU_MMU_INDEX 0
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#define MEMSUFFIX MMU_MODE0_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#define CPU_MMU_INDEX 1
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#define MEMSUFFIX MMU_MODE1_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#if (NB_MMU_MODES >= 3)
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#define CPU_MMU_INDEX 2
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#define MEMSUFFIX MMU_MODE2_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 3) */
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#if (NB_MMU_MODES >= 4)
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#define CPU_MMU_INDEX 3
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#define MEMSUFFIX MMU_MODE3_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 4) */
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#if (NB_MMU_MODES >= 5)
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#define CPU_MMU_INDEX 4
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#define MEMSUFFIX MMU_MODE4_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
|
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#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 5) */
|
||||
|
||||
#if (NB_MMU_MODES >= 6)
|
||||
|
||||
#define CPU_MMU_INDEX 5
|
||||
#define MEMSUFFIX MMU_MODE5_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 6) */
|
||||
|
||||
#if (NB_MMU_MODES > 6)
|
||||
#error "NB_MMU_MODES > 6 is not supported for now"
|
||||
#endif /* (NB_MMU_MODES > 6) */
|
||||
|
||||
/* these access are slower, they must be as rare as possible */
|
||||
#define CPU_MMU_INDEX (cpu_mmu_index(env))
|
||||
#define MEMSUFFIX _data
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
|
||||
#define ldub(p) ldub_data(p)
|
||||
#define ldsb(p) ldsb_data(p)
|
||||
#define lduw(p) lduw_data(p)
|
||||
#define ldsw(p) ldsw_data(p)
|
||||
#define ldl(p) ldl_data(p)
|
||||
#define ldq(p) ldq_data(p)
|
||||
|
||||
#define stb(p, v) stb_data(p, v)
|
||||
#define stw(p, v) stw_data(p, v)
|
||||
#define stl(p, v) stl_data(p, v)
|
||||
#define stq(p, v) stq_data(p, v)
|
||||
|
||||
#define CPU_MMU_INDEX (cpu_mmu_index(env))
|
||||
#define MEMSUFFIX _code
|
||||
#define SOFTMMU_CODE_ACCESS
|
||||
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/cpu_ldst_template.h"
|
||||
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#undef SOFTMMU_CODE_ACCESS
|
||||
|
||||
/**
|
||||
* tlb_vaddr_to_host:
|
||||
* @env: CPUArchState
|
||||
* @addr: guest virtual address to look up
|
||||
* @access_type: 0 for read, 1 for write, 2 for execute
|
||||
* @mmu_idx: MMU index to use for lookup
|
||||
*
|
||||
* Look up the specified guest virtual index in the TCG softmmu TLB.
|
||||
* If the TLB contains a host virtual address suitable for direct RAM
|
||||
* access, then return it. Otherwise (TLB miss, TLB entry is for an
|
||||
* I/O access, etc) return NULL.
|
||||
*
|
||||
* This is the equivalent of the initial fast-path code used by
|
||||
* TCG backends for guest load and store accesses.
|
||||
*/
|
||||
static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr,
|
||||
int access_type, int mmu_idx)
|
||||
{
|
||||
int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
||||
CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index];
|
||||
target_ulong tlb_addr;
|
||||
uintptr_t haddr;
|
||||
|
||||
switch (access_type) {
|
||||
case 0:
|
||||
tlb_addr = tlbentry->addr_read;
|
||||
break;
|
||||
case 1:
|
||||
tlb_addr = tlbentry->addr_write;
|
||||
break;
|
||||
case 2:
|
||||
tlb_addr = tlbentry->addr_code;
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if ((addr & TARGET_PAGE_MASK)
|
||||
!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
|
||||
/* TLB entry is for a different page */
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (tlb_addr & ~TARGET_PAGE_MASK) {
|
||||
/* IO access */
|
||||
return NULL;
|
||||
}
|
||||
|
||||
haddr = addr + env->tlb_table[mmu_idx][index].addend;
|
||||
return (void *)haddr;
|
||||
}
|
||||
|
||||
#endif /* defined(CONFIG_USER_ONLY) */
|
||||
|
||||
#endif /* CPU_LDST_H */
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
* 32 and 64 bit cases, also generate floating point functions with
|
||||
* the same size.
|
||||
*
|
||||
* Not used directly but included from softmmu_exec.h and exec-all.h.
|
||||
* Not used directly but included from cpu_ldst.h.
|
||||
*
|
||||
* Copyright (c) 2003 Fabrice Bellard
|
||||
*
|
||||
@ -344,31 +344,6 @@ bool io_mem_write(struct MemoryRegion *mr, hwaddr addr,
|
||||
void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
|
||||
uintptr_t retaddr);
|
||||
|
||||
uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
|
||||
#define CPU_MMU_INDEX (cpu_mmu_index(env))
|
||||
#define MEMSUFFIX _code
|
||||
#define SOFTMMU_CODE_ACCESS
|
||||
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#undef SOFTMMU_CODE_ACCESS
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USER_ONLY)
|
||||
|
||||
@ -1,216 +0,0 @@
|
||||
/*
|
||||
* Software MMU support
|
||||
*
|
||||
* Generate inline load/store functions for all MMU modes (typically
|
||||
* at least _user and _kernel) as well as _data versions, for all data
|
||||
* sizes.
|
||||
*
|
||||
* Used by target op helpers.
|
||||
*
|
||||
* MMU mode suffixes are defined in target cpu.h.
|
||||
*/
|
||||
|
||||
/* XXX: find something cleaner.
|
||||
* Furthermore, this is false for 64 bits targets
|
||||
*/
|
||||
#define ldul_user ldl_user
|
||||
#define ldul_kernel ldl_kernel
|
||||
#define ldul_hypv ldl_hypv
|
||||
#define ldul_executive ldl_executive
|
||||
#define ldul_supervisor ldl_supervisor
|
||||
|
||||
/* The memory helpers for tcg-generated code need tcg_target_long etc. */
|
||||
#include "tcg.h"
|
||||
|
||||
#define CPU_MMU_INDEX 0
|
||||
#define MEMSUFFIX MMU_MODE0_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
|
||||
#define CPU_MMU_INDEX 1
|
||||
#define MEMSUFFIX MMU_MODE1_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
|
||||
#if (NB_MMU_MODES >= 3)
|
||||
|
||||
#define CPU_MMU_INDEX 2
|
||||
#define MEMSUFFIX MMU_MODE2_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 3) */
|
||||
|
||||
#if (NB_MMU_MODES >= 4)
|
||||
|
||||
#define CPU_MMU_INDEX 3
|
||||
#define MEMSUFFIX MMU_MODE3_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 4) */
|
||||
|
||||
#if (NB_MMU_MODES >= 5)
|
||||
|
||||
#define CPU_MMU_INDEX 4
|
||||
#define MEMSUFFIX MMU_MODE4_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 5) */
|
||||
|
||||
#if (NB_MMU_MODES >= 6)
|
||||
|
||||
#define CPU_MMU_INDEX 5
|
||||
#define MEMSUFFIX MMU_MODE5_SUFFIX
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
#endif /* (NB_MMU_MODES >= 6) */
|
||||
|
||||
#if (NB_MMU_MODES > 6)
|
||||
#error "NB_MMU_MODES > 6 is not supported for now"
|
||||
#endif /* (NB_MMU_MODES > 6) */
|
||||
|
||||
/* these access are slower, they must be as rare as possible */
|
||||
#define CPU_MMU_INDEX (cpu_mmu_index(env))
|
||||
#define MEMSUFFIX _data
|
||||
#define DATA_SIZE 1
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 2
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 4
|
||||
#include "exec/softmmu_header.h"
|
||||
|
||||
#define DATA_SIZE 8
|
||||
#include "exec/softmmu_header.h"
|
||||
#undef CPU_MMU_INDEX
|
||||
#undef MEMSUFFIX
|
||||
|
||||
#define ldub(p) ldub_data(p)
|
||||
#define ldsb(p) ldsb_data(p)
|
||||
#define lduw(p) lduw_data(p)
|
||||
#define ldsw(p) ldsw_data(p)
|
||||
#define ldl(p) ldl_data(p)
|
||||
#define ldq(p) ldq_data(p)
|
||||
|
||||
#define stb(p, v) stb_data(p, v)
|
||||
#define stw(p, v) stw_data(p, v)
|
||||
#define stl(p, v) stl_data(p, v)
|
||||
#define stq(p, v) stq_data(p, v)
|
||||
|
||||
/**
|
||||
* tlb_vaddr_to_host:
|
||||
* @env: CPUArchState
|
||||
* @addr: guest virtual address to look up
|
||||
* @access_type: 0 for read, 1 for write, 2 for execute
|
||||
* @mmu_idx: MMU index to use for lookup
|
||||
*
|
||||
* Look up the specified guest virtual index in the TCG softmmu TLB.
|
||||
* If the TLB contains a host virtual address suitable for direct RAM
|
||||
* access, then return it. Otherwise (TLB miss, TLB entry is for an
|
||||
* I/O access, etc) return NULL.
|
||||
*
|
||||
* This is the equivalent of the initial fast-path code used by
|
||||
* TCG backends for guest load and store accesses.
|
||||
*/
|
||||
static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr,
|
||||
int access_type, int mmu_idx)
|
||||
{
|
||||
int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
||||
CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index];
|
||||
target_ulong tlb_addr;
|
||||
uintptr_t haddr;
|
||||
|
||||
switch (access_type) {
|
||||
case 0:
|
||||
tlb_addr = tlbentry->addr_read;
|
||||
break;
|
||||
case 1:
|
||||
tlb_addr = tlbentry->addr_write;
|
||||
break;
|
||||
case 2:
|
||||
tlb_addr = tlbentry->addr_code;
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if ((addr & TARGET_PAGE_MASK)
|
||||
!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
|
||||
/* TLB entry is for a different page */
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (tlb_addr & ~TARGET_PAGE_MASK) {
|
||||
/* IO access */
|
||||
return NULL;
|
||||
}
|
||||
|
||||
haddr = addr + env->tlb_table[mmu_idx][index].addend;
|
||||
return (void *)haddr;
|
||||
}
|
||||
13
tcg/tcg.h
13
tcg/tcg.h
@ -909,19 +909,6 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
|
||||
# define helper_ret_stq_mmu helper_le_stq_mmu
|
||||
#endif
|
||||
|
||||
uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
|
||||
|
||||
void helper_stb_mmu(CPUArchState *env, target_ulong addr,
|
||||
uint8_t val, int mmu_idx);
|
||||
void helper_stw_mmu(CPUArchState *env, target_ulong addr,
|
||||
uint16_t val, int mmu_idx);
|
||||
void helper_stl_mmu(CPUArchState *env, target_ulong addr,
|
||||
uint32_t val, int mmu_idx);
|
||||
void helper_stq_mmu(CPUArchState *env, target_ulong addr,
|
||||
uint64_t val, int mmu_idx);
|
||||
#endif /* CONFIG_SOFTMMU */
|
||||
|
||||
#endif /* TCG_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user