hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()
NPCM7XX models have been commited after the conversion from
commit 8063396bf3
("Use OBJECT_DECLARE_SIMPLE_TYPE when possible").
Manually convert them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230109140306.23161-11-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
a91179e7a4
commit
c79aa350ea
@ -42,7 +42,7 @@
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* @iref: The internal reference voltage, initialized at launch time.
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* @rv: The calibrated output values of 0.5V and 1.5V for the ADC.
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*/
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typedef struct {
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struct NPCM7xxADCState {
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SysBusDevice parent;
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MemoryRegion iomem;
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@ -60,10 +60,9 @@ typedef struct {
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uint32_t iref;
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uint16_t calibration_r_values[NPCM7XX_ADC_NUM_CALIB];
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} NPCM7xxADCState;
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};
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#define TYPE_NPCM7XX_ADC "npcm7xx-adc"
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#define NPCM7XX_ADC(obj) \
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OBJECT_CHECK(NPCM7xxADCState, (obj), TYPE_NPCM7XX_ADC)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxADCState, NPCM7XX_ADC)
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#endif /* NPCM7XX_ADC_H */
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@ -52,7 +52,7 @@
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#define NPCM7XX_NR_PWM_MODULES 2
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typedef struct NPCM7xxMachine {
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struct NPCM7xxMachine {
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MachineState parent;
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/*
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* PWM fan splitter. each splitter connects to one PWM output and
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@ -60,11 +60,10 @@ typedef struct NPCM7xxMachine {
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*/
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SplitIRQ fan_splitter[NPCM7XX_NR_PWM_MODULES *
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NPCM7XX_PWM_PER_MODULE];
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} NPCM7xxMachine;
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};
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#define TYPE_NPCM7XX_MACHINE MACHINE_TYPE_NAME("npcm7xx")
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#define NPCM7XX_MACHINE(obj) \
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OBJECT_CHECK(NPCM7xxMachine, (obj), TYPE_NPCM7XX_MACHINE)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMachine, NPCM7XX_MACHINE)
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typedef struct NPCM7xxMachineClass {
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MachineClass parent;
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@ -77,7 +76,7 @@ typedef struct NPCM7xxMachineClass {
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#define NPCM7XX_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(NPCM7xxMachineClass, (obj), TYPE_NPCM7XX_MACHINE)
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typedef struct NPCM7xxState {
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struct NPCM7xxState {
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DeviceState parent;
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ARMCPU cpu[NPCM7XX_MAX_NUM_CPUS];
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@ -105,10 +104,10 @@ typedef struct NPCM7xxState {
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NPCM7xxFIUState fiu[2];
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NPCM7xxEMCState emc[2];
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NPCM7xxSDHCIState mmc;
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} NPCM7xxState;
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};
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#define TYPE_NPCM7XX "npcm7xx"
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#define NPCM7XX(obj) OBJECT_CHECK(NPCM7xxState, (obj), TYPE_NPCM7XX)
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OBJECT_DECLARE_TYPE(NPCM7xxState, NPCM7xxClass, NPCM7XX)
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#define TYPE_NPCM730 "npcm730"
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#define TYPE_NPCM750 "npcm750"
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@ -122,11 +121,6 @@ typedef struct NPCM7xxClass {
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uint32_t num_cpus;
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} NPCM7xxClass;
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#define NPCM7XX_CLASS(klass) \
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OBJECT_CLASS_CHECK(NPCM7xxClass, (klass), TYPE_NPCM7XX)
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#define NPCM7XX_GET_CLASS(obj) \
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OBJECT_GET_CLASS(NPCM7xxClass, (obj), TYPE_NPCM7XX)
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/**
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* npcm7xx_load_kernel - Loads memory with everything needed to boot
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* @machine - The machine containing the SoC to be booted.
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@ -68,7 +68,7 @@ typedef enum NPCM7xxSMBusStatus {
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* @rx_cur: The current position of rx_fifo.
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* @status: The current status of the SMBus.
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*/
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typedef struct NPCM7xxSMBusState {
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struct NPCM7xxSMBusState {
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SysBusDevice parent;
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MemoryRegion iomem;
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@ -104,10 +104,9 @@ typedef struct NPCM7xxSMBusState {
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uint8_t rx_cur;
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NPCM7xxSMBusStatus status;
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} NPCM7xxSMBusState;
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};
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#define TYPE_NPCM7XX_SMBUS "npcm7xx-smbus"
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#define NPCM7XX_SMBUS(obj) OBJECT_CHECK(NPCM7xxSMBusState, (obj), \
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TYPE_NPCM7XX_SMBUS)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSMBusState, NPCM7XX_SMBUS)
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#endif /* NPCM7XX_SMBUS_H */
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@ -175,6 +175,6 @@ struct NPCM7xxCLKState {
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};
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#define TYPE_NPCM7XX_CLK "npcm7xx-clk"
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#define NPCM7XX_CLK(obj) OBJECT_CHECK(NPCM7xxCLKState, (obj), TYPE_NPCM7XX_CLK)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxCLKState, NPCM7XX_CLK)
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#endif /* NPCM7XX_CLK_H */
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@ -55,7 +55,7 @@
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*/
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#define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t))
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typedef struct NPCM7xxGCRState {
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struct NPCM7xxGCRState {
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SysBusDevice parent;
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MemoryRegion iomem;
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@ -65,9 +65,9 @@ typedef struct NPCM7xxGCRState {
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uint32_t reset_pwron;
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uint32_t reset_mdlr;
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uint32_t reset_intcr3;
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} NPCM7xxGCRState;
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};
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#define TYPE_NPCM7XX_GCR "npcm7xx-gcr"
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#define NPCM7XX_GCR(obj) OBJECT_CHECK(NPCM7xxGCRState, (obj), TYPE_NPCM7XX_GCR)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxGCRState, NPCM7XX_GCR)
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#endif /* NPCM7XX_GCR_H */
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@ -49,7 +49,7 @@
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* @max_rpm: The maximum rpm for fans. Order: A0, B0, A1, B1.
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* @duty: The duty cycles for fans, relative to NPCM7XX_PWM_MAX_DUTY.
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*/
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typedef struct NPCM7xxMFTState {
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struct NPCM7xxMFTState {
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SysBusDevice parent;
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MemoryRegion iomem;
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@ -61,10 +61,9 @@ typedef struct NPCM7xxMFTState {
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uint32_t max_rpm[NPCM7XX_MFT_FANIN_COUNT];
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uint32_t duty[NPCM7XX_MFT_FANIN_COUNT];
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} NPCM7xxMFTState;
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};
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#define TYPE_NPCM7XX_MFT "npcm7xx-mft"
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#define NPCM7XX_MFT(obj) \
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OBJECT_CHECK(NPCM7xxMFTState, (obj), TYPE_NPCM7XX_MFT)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMFTState, NPCM7XX_MFT)
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#endif /* NPCM7XX_MFT_H */
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@ -101,7 +101,6 @@ struct NPCM7xxPWMState {
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};
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#define TYPE_NPCM7XX_PWM "npcm7xx-pwm"
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#define NPCM7XX_PWM(obj) \
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OBJECT_CHECK(NPCM7xxPWMState, (obj), TYPE_NPCM7XX_PWM)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxPWMState, NPCM7XX_PWM)
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#endif /* NPCM7XX_PWM_H */
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@ -18,7 +18,7 @@
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#include "hw/sysbus.h"
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typedef struct NPCM7xxRNGState {
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struct NPCM7xxRNGState {
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SysBusDevice parent;
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MemoryRegion iomem;
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@ -26,9 +26,9 @@ typedef struct NPCM7xxRNGState {
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uint8_t rngcs;
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uint8_t rngd;
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uint8_t rngmode;
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} NPCM7xxRNGState;
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};
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#define TYPE_NPCM7XX_RNG "npcm7xx-rng"
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#define NPCM7XX_RNG(obj) OBJECT_CHECK(NPCM7xxRNGState, (obj), TYPE_NPCM7XX_RNG)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxRNGState, NPCM7XX_RNG)
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#endif /* NPCM7XX_RNG_H */
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@ -277,10 +277,7 @@ struct NPCM7xxEMCState {
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bool rx_active;
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};
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typedef struct NPCM7xxEMCState NPCM7xxEMCState;
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#define TYPE_NPCM7XX_EMC "npcm7xx-emc"
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#define NPCM7XX_EMC(obj) \
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OBJECT_CHECK(NPCM7xxEMCState, (obj), TYPE_NPCM7XX_EMC)
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxEMCState, NPCM7XX_EMC)
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#endif /* NPCM7XX_EMC_H */
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@ -51,7 +51,7 @@ typedef struct NPCM7xxRegs {
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uint32_t boottoctrl;
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} NPCM7xxRegisters;
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typedef struct NPCM7xxSDHCIState {
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struct NPCM7xxSDHCIState {
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SysBusDevice parent;
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MemoryRegion container;
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@ -60,6 +60,6 @@ typedef struct NPCM7xxSDHCIState {
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NPCM7xxRegisters regs;
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SDHCIState sdhci;
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} NPCM7xxSDHCIState;
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};
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#endif /* NPCM7XX_SDHCI_H */
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