tcg/mips: Make direct jump patching thread-safe
Ensure direct jump patching in MIPS is atomic by using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Message-Id: <1461341333-19646-11-git-send-email-sergey.fedorov@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> [rth: Merged the deposit32 followup.] [rth: Merged the following followup.] Message-Id: <1462210518-26522-1-git-send-email-sergey.fedorov@linaro.org>
This commit is contained in:
parent
84f79fb7c6
commit
c82460a560
@ -1885,7 +1885,6 @@ static void tcg_target_init(TCGContext *s)
|
|||||||
|
|
||||||
void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
|
void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
|
||||||
{
|
{
|
||||||
uint32_t *ptr = (uint32_t *)jmp_addr;
|
atomic_set((uint32_t *)jmp_addr, deposit32(OPC_J, 0, 26, addr >> 2));
|
||||||
*ptr = deposit32(*ptr, 0, 26, addr >> 2);
|
|
||||||
flush_icache_range(jmp_addr, jmp_addr + 4);
|
flush_icache_range(jmp_addr, jmp_addr + 4);
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user