OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

disas/riscv: Provide infrastructure for vendor extensions 

A previous patch provides a pointer to the RISCVCPUConfig data.
Let's use this to add the necessary code for vendor extensions.
This patch does not change the current behaviour, but clearly
defines how vendor extension support can be added to the disassembler.

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230612111034.3955227-7-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Christoph Müllner 2023-06-12 13:10:32 +02:00 committed by Alistair Francis
parent fd7c64f6bd
commit c859a2424d
1 changed files with 26 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
disas/riscv.c
View File

@ -4700,9 +4700,33 @@ disasm_inst(char *buf, size_t buflen, rv_isa isa, uint64_t pc, rv_inst inst,
rv_decode dec = { 0 };
dec.pc = pc;
dec.inst = inst;
dec.opcode_data = rvi_opcode_data;
dec.cfg = cfg;
decode_inst_opcode(&dec, isa);
static const struct {
bool (*guard_func)(const RISCVCPUConfig *);
const rv_opcode_data *opcode_data;
void (*decode_func)(rv_decode *, rv_isa);
} decoders[] = {
{ always_true_p, rvi_opcode_data, decode_inst_opcode },
};
for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) {
bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func;
const rv_opcode_data *opcode_data = decoders[i].opcode_data;
void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func;
if (guard_func(cfg)) {
dec.opcode_data = opcode_data;
decode_func(&dec, isa);
if (dec.op != rv_op_illegal)
break;
}
}
if (dec.op == rv_op_illegal) {
dec.opcode_data = rvi_opcode_data;
}
decode_inst_operands(&dec, isa);
decode_inst_decompress(&dec, isa);
decode_inst_lift_pseudo(&dec);