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target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetree 

Move the following instructions to decodetree:
dctdp:   DFP Convert To DFP Long
dctqpq:  DFP Convert To DFP Extended
drsp:    DFP Round To DFP Short
drdpq:   DFP Round To DFP Long
dcffix:  DFP Convert From Fixed
dcffixq: DFP Convert From Fixed Quad
dctfix:  DFP Convert To Fixed
dctfixq: DFP Convert To Fixed Quad
dxex:    DFP Extract Biased Exponent
dxexq:   DFP Extract Biased Exponent Quad

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-15-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Luis Pires 2021-10-29 16:24:16 -03:00 committed by David Gibson
parent a8f4bce6f8
commit c8ef4d1ec0
5 changed files with 69 additions and 70 deletions
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20
target/ppc/dfp_helper.c
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@ -885,7 +885,7 @@ static void RINTN_PPs(struct PPC_DFP *dfp)
DFP_HELPER_RINT(DRINTN, RINTN_PPs, 64)
DFP_HELPER_RINT(DRINTNQ, RINTN_PPs, 128)
void helper_dctdp(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
void helper_DCTDP(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
{
struct PPC_DFP dfp;
ppc_vsr_t vb;
@ -901,7 +901,7 @@ void helper_dctdp(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
dfp_set_FPRF_from_FRT(&dfp);
}
void helper_dctqpq(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
void helper_DCTQPQ(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
{
struct PPC_DFP dfp;
ppc_vsr_t vb;
@ -916,7 +916,7 @@ void helper_dctqpq(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
set_dfp128(t, &dfp.vt);
}
void helper_drsp(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
void helper_DRSP(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
{
struct PPC_DFP dfp;
uint32_t t_short = 0;
@ -934,7 +934,7 @@ void helper_drsp(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
set_dfp64(t, &vt);
}
void helper_drdpq(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
void helper_DRDPQ(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
{
struct PPC_DFP dfp;
dfp_prepare_decimal128(&dfp, 0, b, env);
@ -972,8 +972,8 @@ static void CFFIX_PPs(struct PPC_DFP *dfp)
dfp_check_for_XX(dfp);
}
DFP_HELPER_CFFIX(dcffix, 64)
DFP_HELPER_CFFIX(dcffixq, 128)
DFP_HELPER_CFFIX(DCFFIX, 64)
DFP_HELPER_CFFIX(DCFFIXQ, 128)
void helper_DCFFIXQQ(CPUPPCState *env, ppc_fprp_t *t, ppc_avr_t *b)
{
@ -1022,8 +1022,8 @@ void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \
set_dfp64(t, &dfp.vt); \
}
DFP_HELPER_CTFIX(dctfix, 64)
DFP_HELPER_CTFIX(dctfixq, 128)
DFP_HELPER_CTFIX(DCTFIX, 64)
DFP_HELPER_CTFIX(DCTFIXQ, 128)
void helper_DCTFIXQQ(CPUPPCState *env, ppc_avr_t *t, ppc_fprp_t *b)
{
@ -1233,8 +1233,8 @@ void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \
} \
}
DFP_HELPER_XEX(dxex, 64)
DFP_HELPER_XEX(dxexq, 128)
DFP_HELPER_XEX(DXEX, 64)
DFP_HELPER_XEX(DXEXQ, 128)
static void dfp_set_raw_exp_64(ppc_vsr_t *t, uint64_t raw)
{

20
target/ppc/helper.h
View File

@ -730,22 +730,22 @@ DEF_HELPER_5(DRINTX, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(DRINTXQ, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(DRINTN, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(DRINTNQ, void, env, fprp, fprp, i32, i32)
DEF_HELPER_3(dctdp, void, env, fprp, fprp)
DEF_HELPER_3(dctqpq, void, env, fprp, fprp)
DEF_HELPER_3(drsp, void, env, fprp, fprp)
DEF_HELPER_3(drdpq, void, env, fprp, fprp)
DEF_HELPER_3(dcffix, void, env, fprp, fprp)
DEF_HELPER_3(dcffixq, void, env, fprp, fprp)
DEF_HELPER_3(DCTDP, void, env, fprp, fprp)
DEF_HELPER_3(DCTQPQ, void, env, fprp, fprp)
DEF_HELPER_3(DRSP, void, env, fprp, fprp)
DEF_HELPER_3(DRDPQ, void, env, fprp, fprp)
DEF_HELPER_3(DCFFIX, void, env, fprp, fprp)
DEF_HELPER_3(DCFFIXQ, void, env, fprp, fprp)
DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr)
DEF_HELPER_3(dctfix, void, env, fprp, fprp)
DEF_HELPER_3(dctfixq, void, env, fprp, fprp)
DEF_HELPER_3(DCTFIX, void, env, fprp, fprp)
DEF_HELPER_3(DCTFIXQ, void, env, fprp, fprp)
DEF_HELPER_3(DCTFIXQQ, void, env, avr, fprp)
DEF_HELPER_4(ddedpd, void, env, fprp, fprp, i32)
DEF_HELPER_4(ddedpdq, void, env, fprp, fprp, i32)
DEF_HELPER_4(denbcd, void, env, fprp, fprp, i32)
DEF_HELPER_4(denbcdq, void, env, fprp, fprp, i32)
DEF_HELPER_3(dxex, void, env, fprp, fprp)
DEF_HELPER_3(dxexq, void, env, fprp, fprp)
DEF_HELPER_3(DXEX, void, env, fprp, fprp)
DEF_HELPER_3(DXEXQ, void, env, fprp, fprp)
DEF_HELPER_4(DIEX, void, env, fprp, fprp, fprp)
DEF_HELPER_4(DIEXQ, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dscri, void, env, fprp, fprp, i32)

23
target/ppc/insn32.decode
View File

@ -54,6 +54,15 @@
@X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp
&X_tb_rc rt rb rc:bool
@X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc
@X_tbp_rc ...... ....0 ..... ....0 .......... rc:1 &X_tb_rc rt=%x_frtp rb=%x_frbp
@X_tp_b_rc ...... ....0 ..... rb:5 .......... rc:1 &X_tb_rc rt=%x_frtp
@X_t_bp_rc ...... rt:5 ..... ....0 .......... rc:1 &X_tb_rc rb=%x_frbp
&X_bi rt bi
@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
@ -272,11 +281,25 @@ DRINTNQ 111111 ..... ---- . ..... .. 11100011 . @Z23_tbp
### Decimal Floating-Point Conversion Instructions
DCTDP 111011 ..... ----- ..... 0100000010 . @X_tb_rc
DCTQPQ 111111 ..... ----- ..... 0100000010 . @X_tp_b_rc
DRSP 111011 ..... ----- ..... 1100000010 . @X_tb_rc
DRDPQ 111111 ..... ----- ..... 1100000010 . @X_tbp_rc
DCFFIX 111011 ..... ----- ..... 1100100010 . @X_tb_rc
DCFFIXQ 111111 ..... ----- ..... 1100100010 . @X_tp_b_rc
DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb
DCTFIX 111011 ..... ----- ..... 0100100010 . @X_tb_rc
DCTFIXQ 111111 ..... ----- ..... 0100100010 . @X_t_bp_rc
DCTFIXQQ 111111 ..... 00001 ..... 1111100010 - @X_vrt_frbp
### Decimal Floating-Point Format Instructions
DXEX 111011 ..... ----- ..... 0101100010 . @X_tb_rc
DXEXQ 111111 ..... ----- ..... 0101100010 . @X_t_bp_rc
DIEX 111011 ..... ..... ..... 1101100010 . @X_rc
DIEXQ 111111 ..... ..... ..... 1101100010 . @X_tp_a_bp_rc

54
target/ppc/translate/dfp-impl.c.inc
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@ -106,23 +106,22 @@ static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
return true; \
}
#define GEN_DFP_T_B_Rc(name) \
static void gen_##name(DisasContext *ctx) \
{ \
TCGv_ptr rt, rb; \
if (unlikely(!ctx->fpu_enabled)) { \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
rt = gen_fprp_ptr(rD(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
gen_helper_##name(cpu_env, rt, rb); \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
tcg_temp_free_ptr(rt); \
tcg_temp_free_ptr(rb); \
}
#define TRANS_DFP_T_B_Rc(NAME) \
static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
{ \
TCGv_ptr rt, rb; \
REQUIRE_INSNS_FLAGS2(ctx, DFP); \
REQUIRE_FPU(ctx); \
rt = gen_fprp_ptr(a->rt); \
rb = gen_fprp_ptr(a->rb); \
gen_helper_##NAME(cpu_env, rt, rb); \
if (unlikely(a->rc)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
tcg_temp_free_ptr(rt); \
tcg_temp_free_ptr(rb); \
return true; \
}
#define GEN_DFP_T_FPR_I32_Rc(name, fprfld, i32fld) \
static void gen_##name(DisasContext *ctx) \
@ -177,20 +176,20 @@ TRANS_DFP_T_B_U32_U32_Rc(DRINTX, r, rmc)
TRANS_DFP_T_B_U32_U32_Rc(DRINTXQ, r, rmc)
TRANS_DFP_T_B_U32_U32_Rc(DRINTN, r, rmc)
TRANS_DFP_T_B_U32_U32_Rc(DRINTNQ, r, rmc)
GEN_DFP_T_B_Rc(dctdp)
GEN_DFP_T_B_Rc(dctqpq)
GEN_DFP_T_B_Rc(drsp)
GEN_DFP_T_B_Rc(drdpq)
GEN_DFP_T_B_Rc(dcffix)
GEN_DFP_T_B_Rc(dcffixq)
GEN_DFP_T_B_Rc(dctfix)
GEN_DFP_T_B_Rc(dctfixq)
TRANS_DFP_T_B_Rc(DCTDP)
TRANS_DFP_T_B_Rc(DCTQPQ)
TRANS_DFP_T_B_Rc(DRSP)
TRANS_DFP_T_B_Rc(DRDPQ)
TRANS_DFP_T_B_Rc(DCFFIX)
TRANS_DFP_T_B_Rc(DCFFIXQ)
TRANS_DFP_T_B_Rc(DCTFIX)
TRANS_DFP_T_B_Rc(DCTFIXQ)
GEN_DFP_T_FPR_I32_Rc(ddedpd, rB, SP)
GEN_DFP_T_FPR_I32_Rc(ddedpdq, rB, SP)
GEN_DFP_T_FPR_I32_Rc(denbcd, rB, SP)
GEN_DFP_T_FPR_I32_Rc(denbcdq, rB, SP)
GEN_DFP_T_B_Rc(dxex)
GEN_DFP_T_B_Rc(dxexq)
TRANS_DFP_T_B_Rc(DXEX)
TRANS_DFP_T_B_Rc(DXEXQ)
TRANS_DFP_T_A_B_Rc(DIEX)
TRANS_DFP_T_A_B_Rc(DIEXQ)
GEN_DFP_T_FPR_I32_Rc(dscli, rA, DCM)
@ -198,7 +197,6 @@ GEN_DFP_T_FPR_I32_Rc(dscliq, rA, DCM)
GEN_DFP_T_FPR_I32_Rc(dscri, rA, DCM)
GEN_DFP_T_FPR_I32_Rc(dscriq, rA, DCM)
#undef GEN_DFP_T_B_Rc
#undef GEN_DFP_T_FPR_I32_Rc
static bool trans_DCFFIXQQ(DisasContext *ctx, arg_DCFFIXQQ *a)

22
target/ppc/translate/dfp-ops.c.inc
View File

@ -12,18 +12,6 @@ GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_DFP)
GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \
GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP)
#define GEN_DFP_T_B_Rc(name, op1, op2) \
_GEN_DFP_LONG(name, op1, op2, 0x001F0000)
#define GEN_DFP_Tp_Bp_Rc(name, op1, op2) \
_GEN_DFP_QUAD(name, op1, op2, 0x003F0800)
#define GEN_DFP_Tp_B_Rc(name, op1, op2) \
_GEN_DFP_QUAD(name, op1, op2, 0x003F0000)
#define GEN_DFP_T_Bp_Rc(name, op1, op2) \
_GEN_DFP_QUAD(name, op1, op2, 0x001F0800)
#define GEN_DFP_SP_T_B_Rc(name, op1, op2) \
_GEN_DFP_LONG(name, op1, op2, 0x00070000)
@ -42,20 +30,10 @@ _GEN_DFP_LONGx2(name, op1, op2, 0x00000000)
#define GEN_DFP_Tp_Ap_SH_Rc(name, op1, op2) \
_GEN_DFP_QUADx2(name, op1, op2, 0x00210000)
GEN_DFP_T_B_Rc(dctdp, 0x02, 0x08),
GEN_DFP_Tp_B_Rc(dctqpq, 0x02, 0x08),
GEN_DFP_T_B_Rc(drsp, 0x02, 0x18),
GEN_DFP_Tp_Bp_Rc(drdpq, 0x02, 0x18),
GEN_DFP_T_B_Rc(dcffix, 0x02, 0x19),
GEN_DFP_Tp_B_Rc(dcffixq, 0x02, 0x19),
GEN_DFP_T_B_Rc(dctfix, 0x02, 0x09),
GEN_DFP_T_Bp_Rc(dctfixq, 0x02, 0x09),
GEN_DFP_SP_T_B_Rc(ddedpd, 0x02, 0x0a),
GEN_DFP_SP_Tp_Bp_Rc(ddedpdq, 0x02, 0x0a),
GEN_DFP_S_T_B_Rc(denbcd, 0x02, 0x1a),
GEN_DFP_S_Tp_Bp_Rc(denbcdq, 0x02, 0x1a),
GEN_DFP_T_B_Rc(dxex, 0x02, 0x0b),
GEN_DFP_T_Bp_Rc(dxexq, 0x02, 0x0b),
GEN_DFP_T_A_SH_Rc(dscli, 0x02, 0x02),
GEN_DFP_Tp_Ap_SH_Rc(dscliq, 0x02, 0x02),
GEN_DFP_T_A_SH_Rc(dscri, 0x02, 0x03),