hw/arm/smmu-common: IOMMU memory region and address space setup
We set up the infrastructure to enumerate all the PCI devices attached to the SMMU and create an associated IOMMU memory region and address space. Those info are stored in SMMUDevice objects. The devices are grouped according to the PCIBus they belong to. A hash table indexed by the PCIBus pointer is used. Also an array indexed by the bus number allows to find the list of SMMUDevices. Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Prem Mallappa <prem.mallappa@broadcom.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1524665762-31355-3-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -28,8 +28,69 @@
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#include "qemu/error-report.h"
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#include "hw/arm/smmu-common.h"
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/**
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* The bus number is used for lookup when SID based invalidation occurs.
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* In that case we lazily populate the SMMUPciBus array from the bus hash
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* table. At the time the SMMUPciBus is created (smmu_find_add_as), the bus
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* numbers may not be always initialized yet.
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*/
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SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num)
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{
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SMMUPciBus *smmu_pci_bus = s->smmu_pcibus_by_bus_num[bus_num];
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if (!smmu_pci_bus) {
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GHashTableIter iter;
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g_hash_table_iter_init(&iter, s->smmu_pcibus_by_busptr);
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while (g_hash_table_iter_next(&iter, NULL, (void **)&smmu_pci_bus)) {
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if (pci_bus_num(smmu_pci_bus->bus) == bus_num) {
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s->smmu_pcibus_by_bus_num[bus_num] = smmu_pci_bus;
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return smmu_pci_bus;
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}
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}
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}
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return smmu_pci_bus;
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}
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static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
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{
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SMMUState *s = opaque;
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SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus);
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SMMUDevice *sdev;
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if (!sbus) {
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sbus = g_malloc0(sizeof(SMMUPciBus) +
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sizeof(SMMUDevice *) * SMMU_PCI_DEVFN_MAX);
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sbus->bus = bus;
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g_hash_table_insert(s->smmu_pcibus_by_busptr, bus, sbus);
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}
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sdev = sbus->pbdev[devfn];
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if (!sdev) {
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char *name = g_strdup_printf("%s-%d-%d",
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s->mrtypename,
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pci_bus_num(bus), devfn);
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sdev = sbus->pbdev[devfn] = g_new0(SMMUDevice, 1);
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sdev->smmu = s;
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sdev->bus = bus;
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sdev->devfn = devfn;
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memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu),
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s->mrtypename,
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OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS);
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address_space_init(&sdev->as,
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MEMORY_REGION(&sdev->iommu), name);
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trace_smmu_add_mr(name);
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g_free(name);
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}
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return &sdev->as;
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}
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static void smmu_base_realize(DeviceState *dev, Error **errp)
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{
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SMMUState *s = ARM_SMMU(dev);
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SMMUBaseClass *sbc = ARM_SMMU_GET_CLASS(dev);
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Error *local_err = NULL;
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@ -38,6 +99,14 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
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error_propagate(errp, local_err);
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return;
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}
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s->smmu_pcibus_by_busptr = g_hash_table_new(NULL, NULL);
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if (s->primary_bus) {
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pci_setup_iommu(s->primary_bus, smmu_find_add_as, s);
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} else {
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error_setg(errp, "SMMU is not attached to any PCI bus!");
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}
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}
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static void smmu_base_reset(DeviceState *dev)
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@ -2,3 +2,6 @@
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# hw/arm/virt-acpi-build.c
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virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
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# hw/arm/smmu-common.c
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smmu_add_mr(const char *name) "%s"
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@ -120,4 +120,12 @@ typedef struct {
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#define ARM_SMMU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SMMUBaseClass, (obj), TYPE_ARM_SMMU)
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/* Return the SMMUPciBus handle associated to a PCI bus number */
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SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num);
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/* Return the stream ID of an SMMU device */
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static inline uint16_t smmu_get_sid(SMMUDevice *sdev)
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{
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return PCI_BUILD_BDF(pci_bus_num(sdev->bus), sdev->devfn);
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}
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#endif /* HW_ARM_SMMU_COMMON */
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