diff --git a/target-arm/helper.c b/target-arm/helper.c
index c491cd80ab..b2d2440edd 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5316,6 +5316,7 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
     env->daif |= val & CPSR_AIF & mask;
 
     if (write_type != CPSRWriteRaw &&
+        (env->uncached_cpsr & CPSR_M) != CPSR_USER &&
         ((env->uncached_cpsr ^ val) & mask & CPSR_M)) {
         if (bad_mode_switch(env, val & CPSR_M)) {
             /* Attempt to switch to an invalid mode: this is UNPREDICTABLE.