Use concet TCG instructions in the MIPS target.

Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5303 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-09-22 21:54:00 +00:00
parent 28de16da38
commit cb2c9921f8
1 changed files with 4 additions and 24 deletions

View File

@ -2129,7 +2129,6 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32s_tl(t0, t0);
tcg_gen_ext32s_tl(t1, t1);
@ -2138,11 +2137,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
tcg_gen_mul_i64(r_tmp1, r_tmp1, r_tmp2);
gen_load_LO(t0, 0);
gen_load_HI(t1, 0);
tcg_gen_extu_tl_i64(r_tmp2, t0);
tcg_gen_extu_tl_i64(r_tmp3, t1);
tcg_gen_shli_i64(r_tmp3, r_tmp3, 32);
tcg_gen_or_i64(r_tmp2, r_tmp2, r_tmp3);
tcg_temp_free(r_tmp3);
tcg_gen_concat_tl_i64(r_tmp2, t0, t1);
tcg_gen_add_i64(r_tmp1, r_tmp1, r_tmp2);
tcg_temp_free(r_tmp2);
tcg_gen_trunc_i64_tl(t0, r_tmp1);
@ -2160,7 +2155,6 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32u_tl(t0, t0);
tcg_gen_ext32u_tl(t1, t1);
@ -2169,11 +2163,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
tcg_gen_mul_i64(r_tmp1, r_tmp1, r_tmp2);
gen_load_LO(t0, 0);
gen_load_HI(t1, 0);
tcg_gen_extu_tl_i64(r_tmp2, t0);
tcg_gen_extu_tl_i64(r_tmp3, t1);
tcg_gen_shli_i64(r_tmp3, r_tmp3, 32);
tcg_gen_or_i64(r_tmp2, r_tmp2, r_tmp3);
tcg_temp_free(r_tmp3);
tcg_gen_concat_tl_i64(r_tmp2, t0, t1);
tcg_gen_add_i64(r_tmp1, r_tmp1, r_tmp2);
tcg_temp_free(r_tmp2);
tcg_gen_trunc_i64_tl(t0, r_tmp1);
@ -2191,7 +2181,6 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32s_tl(t0, t0);
tcg_gen_ext32s_tl(t1, t1);
@ -2200,11 +2189,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
tcg_gen_mul_i64(r_tmp1, r_tmp1, r_tmp2);
gen_load_LO(t0, 0);
gen_load_HI(t1, 0);
tcg_gen_extu_tl_i64(r_tmp2, t0);
tcg_gen_extu_tl_i64(r_tmp3, t1);
tcg_gen_shli_i64(r_tmp3, r_tmp3, 32);
tcg_gen_or_i64(r_tmp2, r_tmp2, r_tmp3);
tcg_temp_free(r_tmp3);
tcg_gen_concat_tl_i64(r_tmp2, t0, t1);
tcg_gen_sub_i64(r_tmp1, r_tmp1, r_tmp2);
tcg_temp_free(r_tmp2);
tcg_gen_trunc_i64_tl(t0, r_tmp1);
@ -2222,7 +2207,6 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32u_tl(t0, t0);
tcg_gen_ext32u_tl(t1, t1);
@ -2231,11 +2215,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
tcg_gen_mul_i64(r_tmp1, r_tmp1, r_tmp2);
gen_load_LO(t0, 0);
gen_load_HI(t1, 0);
tcg_gen_extu_tl_i64(r_tmp2, t0);
tcg_gen_extu_tl_i64(r_tmp3, t1);
tcg_gen_shli_i64(r_tmp3, r_tmp3, 32);
tcg_gen_or_i64(r_tmp2, r_tmp2, r_tmp3);
tcg_temp_free(r_tmp3);
tcg_gen_concat_tl_i64(r_tmp2, t0, t1);
tcg_gen_sub_i64(r_tmp1, r_tmp1, r_tmp2);
tcg_temp_free(r_tmp2);
tcg_gen_trunc_i64_tl(t0, r_tmp1);