Fix ARM quadword VDUP (core register).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6857 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -2783,10 +2783,12 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
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} else if (size == 1) {
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} else if (size == 1) {
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gen_neon_dup_low16(tmp);
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gen_neon_dup_low16(tmp);
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}
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}
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for (n = 0; n <= pass * 2; n++) {
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tmp2 = new_tmp();
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tmp2 = new_tmp();
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tcg_gen_mov_i32(tmp2, tmp);
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tcg_gen_mov_i32(tmp2, tmp);
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neon_store_reg(rn, 0, tmp2);
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neon_store_reg(rn, n, tmp2);
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neon_store_reg(rn, 1, tmp);
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}
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neon_store_reg(rn, n, tmp);
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} else {
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} else {
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/* VMOV */
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/* VMOV */
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switch (size) {
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switch (size) {
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