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Sparc: fix PC/NPC during FPU traps

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All FPU instructions can trap, so save PC/NPC state before
executing them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2010-04-17 16:25:04 +00:00
parent 655feed5d9
commit cca1d527ef
1 changed files with 2 additions and 0 deletions
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2
target-sparc/translate.c
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@ -2155,6 +2155,7 @@ static void disas_sparc_insn(DisasContext * dc)
rs1 = GET_FIELD(insn, 13, 17); rs1 = GET_FIELD(insn, 13, 17);
rs2 = GET_FIELD(insn, 27, 31); rs2 = GET_FIELD(insn, 27, 31);
xop = GET_FIELD(insn, 18, 26); xop = GET_FIELD(insn, 18, 26);
save_state(dc, cpu_cond);
switch (xop) { switch (xop) {
case 0x1: /* fmovs */ case 0x1: /* fmovs */
tcg_gen_mov_i32(cpu_fpr[rd], cpu_fpr[rs2]); tcg_gen_mov_i32(cpu_fpr[rd], cpu_fpr[rs2]);
@ -2468,6 +2469,7 @@ static void disas_sparc_insn(DisasContext * dc)
rs1 = GET_FIELD(insn, 13, 17); rs1 = GET_FIELD(insn, 13, 17);
rs2 = GET_FIELD(insn, 27, 31); rs2 = GET_FIELD(insn, 27, 31);
xop = GET_FIELD(insn, 18, 26); xop = GET_FIELD(insn, 18, 26);
save_state(dc, cpu_cond);
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
if ((xop & 0x11f) == 0x005) { // V9 fmovsr if ((xop & 0x11f) == 0x005) { // V9 fmovsr
int l1; int l1;