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SPARC64: fix fnor* and fnand*

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Fix the problem that result values are not assigned to the destination
registers.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Tsuneo Saito 2011-07-23 11:20:06 +09:00 committed by Blue Swirl
parent 5e37141bbb
commit ccb57e0ea7
1 changed files with 8 additions and 6 deletions
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14
target-sparc/translate.c
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@ -3980,14 +3980,15 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x062: /* VIS I fnor */
CHECK_FPU_FEATURE(dc, VIS1);
tcg_gen_nor_i32(cpu_tmp32, cpu_fpr[DFPREG(rs1)],
tcg_gen_nor_i32(cpu_fpr[DFPREG(rd)], cpu_fpr[DFPREG(rs1)],
cpu_fpr[DFPREG(rs2)]);
tcg_gen_nor_i32(cpu_tmp32, cpu_fpr[DFPREG(rs1) + 1],
tcg_gen_nor_i32(cpu_fpr[DFPREG(rd) + 1],
cpu_fpr[DFPREG(rs1) + 1],
cpu_fpr[DFPREG(rs2) + 1]);
break;
case 0x063: /* VIS I fnors */
CHECK_FPU_FEATURE(dc, VIS1);
tcg_gen_nor_i32(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
tcg_gen_nor_i32(cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]);
break;
case 0x064: /* VIS I fandnot2 */
CHECK_FPU_FEATURE(dc, VIS1);
@ -4047,14 +4048,15 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x06e: /* VIS I fnand */
CHECK_FPU_FEATURE(dc, VIS1);
tcg_gen_nand_i32(cpu_tmp32, cpu_fpr[DFPREG(rs1)],
tcg_gen_nand_i32(cpu_fpr[DFPREG(rd)], cpu_fpr[DFPREG(rs1)],
cpu_fpr[DFPREG(rs2)]);
tcg_gen_nand_i32(cpu_tmp32, cpu_fpr[DFPREG(rs1) + 1],
tcg_gen_nand_i32(cpu_fpr[DFPREG(rd) + 1],
cpu_fpr[DFPREG(rs1) + 1],
cpu_fpr[DFPREG(rs2) + 1]);
break;
case 0x06f: /* VIS I fnands */
CHECK_FPU_FEATURE(dc, VIS1);
tcg_gen_nand_i32(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
tcg_gen_nand_i32(cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]);
break;
case 0x070: /* VIS I fand */
CHECK_FPU_FEATURE(dc, VIS1);