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target/s390x: Return exception from mmu_translate 

Do not raise the exception directly within mmu_translate,
but pass it back so that caller may do so.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20191001171614.8405-10-richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
This commit is contained in:
Richard Henderson 2019-10-01 10:16:05 -07:00 committed by David Hildenbrand
parent c7363b28ff
commit ce7ac79d28
5 changed files with 35 additions and 38 deletions
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4
target/s390x/excp_helper.c
View File

@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
if (!(env->psw.mask & PSW_MASK_64)) {
vaddr &= 0x7fffffff;
}
fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true);
excp = 0; /* exception already raised */
excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec);
fail = excp;
} else if (mmu_idx == MMU_REAL_IDX) {
/* 31-Bit mode */
if (!(env->psw.mask & PSW_MASK_64)) {

3
target/s390x/helper.c
View File

@ -52,6 +52,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
target_ulong raddr;
int prot;
uint64_t asc = env->psw.mask & PSW_MASK_ASC;
uint64_t tec;
/* 31-Bit mode */
if (!(env->psw.mask & PSW_MASK_64)) {
@ -67,7 +68,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
* We want to read code even if IEP is active. Use MMU_DATA_LOAD instead
* of MMU_INST_FETCH.
*/
if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false)) {
if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) {
return -1;
}
return raddr;

2
target/s390x/internal.h
View File

@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
/* mmu_helper.c */
int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
target_ulong *raddr, int *flags, bool exc);
target_ulong *raddr, int *flags, uint64_t *tec);
int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,
target_ulong *addr, int *flags, uint64_t *tec);

13
target/s390x/mem_helper.c
View File

@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr)
CPUState *cs = env_cpu(env);
uint32_t cc = 0;
uint64_t asc = env->psw.mask & PSW_MASK_ASC;
uint64_t ret;
int old_exc, flags;
uint64_t ret, tec;
int old_exc, flags, exc;
/* XXX incomplete - has more corner cases */
if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) {
@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr)
}
old_exc = cs->exception_index;
if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) {
exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec);
if (exc) {
/*
* We don't care about ILEN or TEC, as we're not going to
* deliver the exception -- thus resetting exception_index below.
* TODO: clean this up.
*/
trigger_pgm_exception(env, exc, ILEN_UNWIND);
cc = 3;
}
if (cs->exception_index == EXCP_PGM) {

51
target/s390x/mmu_helper.c
View File

@ -365,20 +365,18 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags)
* @param raddr the translated address is stored to this pointer
* @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer
* @param exc true = inject a program check if a fault occurred
* @return 0 if the translation was successful, -1 if a fault occurred
* @return 0 = success, != 0, the exception to raise
*/
int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
target_ulong *raddr, int *flags, bool exc)
target_ulong *raddr, int *flags, uint64_t *tec)
{
/* Code accesses have an undefined ilc, let's use 2 bytes. */
const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO;
uint64_t tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) |
(rw == MMU_DATA_STORE ? FS_WRITE : FS_READ);
uint64_t asce;
int r;
*tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) |
(rw == MMU_DATA_STORE ? FS_WRITE : FS_READ);
*flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, asc)) {
/*
* If any part of this page is currently protected, make sure the
@ -390,12 +388,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
*/
*flags |= PAGE_WRITE_INV;
if (is_low_address(vaddr) && rw == MMU_DATA_STORE) {
if (exc) {
/* LAP sets bit 56 */
tec |= 0x80;
trigger_access_exception(env, PGM_PROTECTION, ilen, tec);
}
return -EACCES;
/* LAP sets bit 56 */
*tec |= 0x80;
return PGM_PROTECTION;
}
}
@ -425,30 +420,21 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
/* perform the DAT translation */
r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw);
if (unlikely(r)) {
if (exc) {
trigger_access_exception(env, r, ilen, tec);
}
return -1;
return r;
}
/* check for DAT protection */
if (unlikely(rw == MMU_DATA_STORE && !(*flags & PAGE_WRITE))) {
if (exc) {
/* DAT sets bit 61 only */
tec |= 0x4;
trigger_access_exception(env, PGM_PROTECTION, ilen, tec);
}
return -1;
/* DAT sets bit 61 only */
*tec |= 0x4;
return PGM_PROTECTION;
}
/* check for Instruction-Execution-Protection */
if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) {
if (exc) {
/* IEP sets bit 56 and 61 */
tec |= 0x84;
trigger_access_exception(env, PGM_PROTECTION, ilen, tec);
}
return -1;
/* IEP sets bit 56 and 61 */
*tec |= 0x84;
return PGM_PROTECTION;
}
nodat:
@ -472,9 +458,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages,
int ret, i, pflags;
for (i = 0; i < nr_pages; i++) {
ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true);
uint64_t tec;
ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec);
if (ret) {
return ret;
trigger_access_exception(env, ret, ILEN_AUTO, tec);
return -EFAULT;
}
if (!address_space_access_valid(&address_space_memory, pages[i],
TARGET_PAGE_SIZE, is_write,