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target-ppc: VSX Stage 4: Add xssqrtsp 

This patch adds the VSX Scalar Square Root Single Precision (xssqrtsp)
instruction.

The existing VSX_SQRT() macro is modified to support rounding of the
intermediate double-precision result to single-precision.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-01-15 08:10:37 -06:00 committed by Alexander Graf
parent 2c0c52ae62
commit cea4e57473
3 changed files with 12 additions and 4 deletions
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13
target-ppc/fpu_helper.c
View File

@ -1969,7 +1969,7 @@ VSX_RE(xvresp, 4, float32, f32, 0, 0)
* fld - vsr_t field (f32 or f64)
* sfprf - set FPRF
*/
#define VSX_SQRT(op, nels, tp, fld, sfprf) \
#define VSX_SQRT(op, nels, tp, fld, sfprf, r2sp) \
void helper_##op(CPUPPCState *env, uint32_t opcode) \
{ \
ppc_vsr_t xt, xb; \
@ -1993,6 +1993,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
} \
\
if (r2sp) { \
xt.fld[i] = helper_frsp(env, xt.fld[i]); \
} \
\
if (sfprf) { \
helper_compute_fprf(env, xt.fld[i], sfprf); \
} \
@ -2002,9 +2006,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
helper_float_check_status(env); \
}
VSX_SQRT(xssqrtdp, 1, float64, f64, 1)
VSX_SQRT(xvsqrtdp, 2, float64, f64, 0)
VSX_SQRT(xvsqrtsp, 4, float32, f32, 0)
VSX_SQRT(xssqrtdp, 1, float64, f64, 1, 0)
VSX_SQRT(xssqrtsp, 1, float64, f64, 1, 1)
VSX_SQRT(xvsqrtdp, 2, float64, f64, 0, 0)
VSX_SQRT(xvsqrtsp, 4, float32, f32, 0, 0)
/* VSX_RSQRTE - VSX floating point reciprocal square root estimate
* op - instruction mnemonic

1
target-ppc/helper.h
View File

@ -291,6 +291,7 @@ DEF_HELPER_2(xssubsp, void, env, i32)
DEF_HELPER_2(xsmulsp, void, env, i32)
DEF_HELPER_2(xsdivsp, void, env, i32)
DEF_HELPER_2(xsresp, void, env, i32)
DEF_HELPER_2(xssqrtsp, void, env, i32)
DEF_HELPER_2(xvadddp, void, env, i32)
DEF_HELPER_2(xvsubdp, void, env, i32)

2
target-ppc/translate.c
View File

@ -7363,6 +7363,7 @@ GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xsmulsp, 0x00, 0x02, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xsdivsp, 0x00, 0x03, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xsresp, 0x14, 0x01, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xssqrtsp, 0x16, 0x00, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
@ -10175,6 +10176,7 @@ GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207),
GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207),
GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207),
GEN_XX2FORM(xsresp, 0x14, 0x01, PPC2_VSX207),
GEN_XX2FORM(xssqrtsp, 0x16, 0x00, PPC2_VSX207),
GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),