hw/arm/exynos4210: Put combiners into state struct
Switch the creation of the combiner devices to the new-style "embedded in state struct" approach, so we can easily refer to the object elsewhere during realize. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220404154658.565020-18-peter.maydell@linaro.org
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@ -624,25 +624,23 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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}
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}
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/* Internal Interrupt Combiner */
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/* Internal Interrupt Combiner */
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dev = qdev_new("exynos4210.combiner");
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busdev = SYS_BUS_DEVICE(&s->int_combiner);
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_realize(busdev, &error_fatal);
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sysbus_realize_and_unref(busdev, &error_fatal);
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for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
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for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
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sysbus_connect_irq(busdev, n,
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sysbus_connect_irq(busdev, n,
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qdev_get_gpio_in(DEVICE(&s->a9mpcore), n));
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qdev_get_gpio_in(DEVICE(&s->a9mpcore), n));
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}
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}
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exynos4210_combiner_get_gpioin(&s->irqs, dev, 0);
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exynos4210_combiner_get_gpioin(&s->irqs, DEVICE(&s->int_combiner), 0);
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sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR);
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sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR);
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/* External Interrupt Combiner */
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/* External Interrupt Combiner */
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dev = qdev_new("exynos4210.combiner");
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qdev_prop_set_uint32(DEVICE(&s->ext_combiner), "external", 1);
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qdev_prop_set_uint32(dev, "external", 1);
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busdev = SYS_BUS_DEVICE(&s->ext_combiner);
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_realize(busdev, &error_fatal);
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sysbus_realize_and_unref(busdev, &error_fatal);
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for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
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for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
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sysbus_connect_irq(busdev, n, qdev_get_gpio_in(DEVICE(&s->ext_gic), n));
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sysbus_connect_irq(busdev, n, qdev_get_gpio_in(DEVICE(&s->ext_gic), n));
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}
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}
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exynos4210_combiner_get_gpioin(&s->irqs, dev, 1);
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exynos4210_combiner_get_gpioin(&s->irqs, DEVICE(&s->ext_combiner), 1);
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sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
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sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
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/* Initialize board IRQs. */
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/* Initialize board IRQs. */
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@ -844,6 +842,10 @@ static void exynos4210_init(Object *obj)
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object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV);
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object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV);
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object_initialize_child(obj, "ext-gic", &s->ext_gic, TYPE_EXYNOS4210_GIC);
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object_initialize_child(obj, "ext-gic", &s->ext_gic, TYPE_EXYNOS4210_GIC);
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object_initialize_child(obj, "int-combiner", &s->int_combiner,
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TYPE_EXYNOS4210_COMBINER);
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object_initialize_child(obj, "ext-combiner", &s->ext_combiner,
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TYPE_EXYNOS4210_COMBINER);
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}
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}
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static void exynos4210_class_init(ObjectClass *klass, void *data)
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static void exynos4210_class_init(ObjectClass *klass, void *data)
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@ -31,7 +31,7 @@
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#include "hw/sysbus.h"
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#include "hw/sysbus.h"
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#include "migration/vmstate.h"
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#include "migration/vmstate.h"
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "hw/intc/exynos4210_combiner.h"
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#include "hw/arm/exynos4210.h"
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#include "hw/arm/exynos4210.h"
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#include "hw/hw.h"
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#include "hw/hw.h"
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#include "hw/irq.h"
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#include "hw/irq.h"
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@ -48,36 +48,7 @@
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#define DPRINTF(fmt, ...) do {} while (0)
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#define DPRINTF(fmt, ...) do {} while (0)
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#endif
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#endif
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#define IIC_NGRP 64 /* Internal Interrupt Combiner
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Groups number */
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#define IIC_NIRQ (IIC_NGRP * 8)/* Internal Interrupt Combiner
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Interrupts number */
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#define IIC_REGION_SIZE 0x108 /* Size of memory mapped region */
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#define IIC_REGION_SIZE 0x108 /* Size of memory mapped region */
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#define IIC_REGSET_SIZE 0x41
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/*
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* State for each output signal of internal combiner
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*/
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typedef struct CombinerGroupState {
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uint8_t src_mask; /* 1 - source enabled, 0 - disabled */
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uint8_t src_pending; /* Pending source interrupts before masking */
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} CombinerGroupState;
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#define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
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OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210CombinerState, EXYNOS4210_COMBINER)
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struct Exynos4210CombinerState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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struct CombinerGroupState group[IIC_NGRP];
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uint32_t reg_set[IIC_REGSET_SIZE];
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uint32_t icipsr[2];
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uint32_t external; /* 1 means that this combiner is external */
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qemu_irq output_irq[IIC_NGRP];
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};
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static const VMStateDescription vmstate_exynos4210_combiner_group_state = {
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static const VMStateDescription vmstate_exynos4210_combiner_group_state = {
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.name = "exynos4210.combiner.groupstate",
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.name = "exynos4210.combiner.groupstate",
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@ -28,6 +28,7 @@
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#include "hw/sysbus.h"
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#include "hw/sysbus.h"
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#include "hw/cpu/a9mpcore.h"
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#include "hw/cpu/a9mpcore.h"
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#include "hw/intc/exynos4210_gic.h"
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#include "hw/intc/exynos4210_gic.h"
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#include "hw/intc/exynos4210_combiner.h"
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#include "hw/core/split-irq.h"
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#include "hw/core/split-irq.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/cpu-qom.h"
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#include "qom/object.h"
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#include "qom/object.h"
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@ -105,6 +106,8 @@ struct Exynos4210State {
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qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
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qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
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A9MPPrivState a9mpcore;
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A9MPPrivState a9mpcore;
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Exynos4210GicState ext_gic;
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Exynos4210GicState ext_gic;
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Exynos4210CombinerState int_combiner;
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Exynos4210CombinerState ext_combiner;
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SplitIRQ splitter[EXYNOS4210_NUM_SPLITTERS];
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SplitIRQ splitter[EXYNOS4210_NUM_SPLITTERS];
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};
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};
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@ -0,0 +1,57 @@
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/*
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* Samsung exynos4210 Interrupt Combiner
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*
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* Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
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* All rights reserved.
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*
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* Evgeny Voevodin <e.voevodin@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_INTC_EXYNOS4210_COMBINER
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#define HW_INTC_EXYNOS4210_COMBINER
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#include "hw/sysbus.h"
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/*
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* State for each output signal of internal combiner
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*/
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typedef struct CombinerGroupState {
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uint8_t src_mask; /* 1 - source enabled, 0 - disabled */
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uint8_t src_pending; /* Pending source interrupts before masking */
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} CombinerGroupState;
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#define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
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OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210CombinerState, EXYNOS4210_COMBINER)
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/* Number of groups and total number of interrupts for the internal combiner */
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#define IIC_NGRP 64
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#define IIC_NIRQ (IIC_NGRP * 8)
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#define IIC_REGSET_SIZE 0x41
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struct Exynos4210CombinerState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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struct CombinerGroupState group[IIC_NGRP];
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uint32_t reg_set[IIC_REGSET_SIZE];
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uint32_t icipsr[2];
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uint32_t external; /* 1 means that this combiner is external */
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qemu_irq output_irq[IIC_NGRP];
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};
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#endif
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