tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr
Instead of exporting goto_ptr directly to TCG frontends, export tcg_gen_lookup_and_goto_ptr(), which calls goto_ptr with the pointer returned by the lookup_tb_ptr() helper. This is the only use case we have for goto_ptr and lookup_tb_ptr, so having this function is very convenient. Furthermore, it trivially allows us to avoid calling the lookup helper if goto_ptr is not implemented by the backend. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1493263764-18657-2-git-send-email-cota@braap.org> Message-Id: <1493263764-18657-3-git-send-email-cota@braap.org> Message-Id: <1493263764-18657-4-git-send-email-cota@braap.org> Message-Id: <1493263764-18657-5-git-send-email-cota@braap.org> [rth: Squashed 4 related commits.] Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -309,10 +309,8 @@ static bool tb_cmp(const void *p, const void *d)
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return false;
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}
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static TranslationBlock *tb_htable_lookup(CPUState *cpu,
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target_ulong pc,
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target_ulong cs_base,
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uint32_t flags)
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TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags)
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{
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tb_page_addr_t phys_pc;
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struct tb_desc desc;
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@ -368,6 +368,8 @@ struct TranslationBlock {
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void tb_free(TranslationBlock *tb);
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void tb_flush(CPUState *cpu);
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void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
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TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags);
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#if defined(USE_DIRECT_JUMP)
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@ -27,6 +27,9 @@
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#include "exec/helper-proto.h"
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#include "exec/cpu_ldst.h"
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#include "exec/exec-all.h"
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#include "exec/tb-hash.h"
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#include "disas/disas.h"
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#include "exec/log.h"
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/* 32-bit helpers */
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@ -141,6 +144,35 @@ uint64_t HELPER(ctpop_i64)(uint64_t arg)
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return ctpop64(arg);
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}
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void *HELPER(lookup_tb_ptr)(CPUArchState *env, target_ulong addr)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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uint32_t flags;
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tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
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if (likely(tb)) {
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
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if (likely(tb->pc == addr && tb->cs_base == cs_base &&
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tb->flags == flags)) {
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goto found;
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}
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tb = tb_htable_lookup(cpu, addr, cs_base, flags);
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if (likely(tb)) {
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atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)], tb);
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goto found;
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}
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}
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return tcg_ctx.code_gen_epilogue;
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found:
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qemu_log_mask_and_addr(CPU_LOG_EXEC, addr,
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"Chain %p [%d: " TARGET_FMT_lx "] %s\n",
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tb->tc_ptr, cpu->cpu_index, addr,
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lookup_symbol(addr));
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return tb->tc_ptr;
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}
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void HELPER(exit_atomic)(CPUArchState *env)
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{
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cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC());
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@ -477,6 +477,14 @@ current TB was linked to this TB. Otherwise execute the next
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instructions. Only indices 0 and 1 are valid and tcg_gen_goto_tb may be issued
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at most once with each slot index per TB.
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* lookup_and_goto_ptr tb_addr
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Look up a TB address ('tb_addr') and jump to it if valid. If not valid,
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jump to the TCG epilogue to go back to the exec loop.
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This operation is optional. If the TCG backend does not implement the
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goto_ptr opcode, emitting this op is equivalent to emitting exit_tb(0).
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* qemu_ld_i32/i64 t0, t1, flags, memidx
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* qemu_st_i32/i64 t0, t1, flags, memidx
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@ -77,6 +77,7 @@ typedef enum {
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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#define TCG_TARGET_HAS_extrh_i64_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#define TCG_TARGET_HAS_div_i64 1
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#define TCG_TARGET_HAS_rem_i64 1
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@ -123,6 +123,7 @@ extern bool use_idiv_instructions;
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
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#define TCG_TARGET_HAS_rem_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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enum {
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TCG_AREG0 = TCG_REG_R6,
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@ -107,6 +107,7 @@ extern bool have_popcnt;
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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@ -173,6 +173,7 @@ typedef enum {
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#define TCG_TARGET_HAS_mulsh_i64 0
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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#define TCG_TARGET_HAS_extrh_i64_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#define TCG_TARGET_deposit_i32_valid(ofs, len) ((len) <= 16)
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#define TCG_TARGET_deposit_i64_valid(ofs, len) ((len) <= 16)
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@ -130,6 +130,7 @@ extern bool use_mips32r2_instructions;
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#define TCG_TARGET_HAS_muluh_i32 1
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#define TCG_TARGET_HAS_mulsh_i32 1
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#define TCG_TARGET_HAS_bswap32_i32 1
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#define TCG_TARGET_HAS_goto_ptr 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_add2_i32 0
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@ -82,6 +82,7 @@ extern bool have_isa_3_00;
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#define TCG_TARGET_HAS_muls2_i32 0
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#define TCG_TARGET_HAS_muluh_i32 1
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#define TCG_TARGET_HAS_mulsh_i32 1
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#define TCG_TARGET_HAS_goto_ptr 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_add2_i32 0
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@ -92,6 +92,7 @@ extern uint64_t s390_facilities;
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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#define TCG_TARGET_HAS_extrh_i64_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#define TCG_TARGET_HAS_div2_i64 1
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#define TCG_TARGET_HAS_rot_i64 1
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@ -123,6 +123,7 @@ extern bool use_vis3_instructions;
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#define TCG_TARGET_HAS_extrl_i64_i32 1
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#define TCG_TARGET_HAS_extrh_i64_i32 1
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12
tcg/tcg-op.c
12
tcg/tcg-op.c
@ -2587,6 +2587,18 @@ void tcg_gen_goto_tb(unsigned idx)
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tcg_gen_op1i(INDEX_op_goto_tb, idx);
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}
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void tcg_gen_lookup_and_goto_ptr(TCGv addr)
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{
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if (TCG_TARGET_HAS_goto_ptr && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
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TCGv_ptr ptr = tcg_temp_new_ptr();
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gen_helper_lookup_tb_ptr(ptr, tcg_ctx.tcg_env, addr);
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tcg_gen_op1i(INDEX_op_goto_ptr, GET_TCGV_PTR(ptr));
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tcg_temp_free_ptr(ptr);
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} else {
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tcg_gen_exit_tb(0);
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}
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}
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static inline TCGMemOp tcg_canonicalize_memop(TCGMemOp op, bool is64, bool st)
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{
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/* Trigger the asserts within as early as possible. */
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11
tcg/tcg-op.h
11
tcg/tcg-op.h
@ -796,6 +796,17 @@ static inline void tcg_gen_exit_tb(uintptr_t val)
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*/
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void tcg_gen_goto_tb(unsigned idx);
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/**
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* tcg_gen_lookup_and_goto_ptr() - look up a TB and jump to it if valid
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* @addr: Guest address of the target TB
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*
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* If the TB is not valid, jump to the epilogue.
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*
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* This operation is optional. If the TCG backend does not implement goto_ptr,
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* this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
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*/
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void tcg_gen_lookup_and_goto_ptr(TCGv addr);
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#if TARGET_LONG_BITS == 32
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#define tcg_temp_new() tcg_temp_new_i32()
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#define tcg_global_reg_new tcg_global_reg_new_i32
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@ -193,6 +193,7 @@ DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS,
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TCG_OPF_NOT_PRESENT)
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DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END)
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DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END)
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DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_END | IMPL(TCG_TARGET_HAS_goto_ptr))
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DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1,
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TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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@ -24,6 +24,8 @@ DEF_HELPER_FLAGS_1(clrsb_i64, TCG_CALL_NO_RWG_SE, i64, i64)
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DEF_HELPER_FLAGS_1(ctpop_i32, TCG_CALL_NO_RWG_SE, i32, i32)
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DEF_HELPER_FLAGS_1(ctpop_i64, TCG_CALL_NO_RWG_SE, i64, i64)
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DEF_HELPER_FLAGS_2(lookup_tb_ptr, TCG_CALL_NO_WG_SE, ptr, env, tl)
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DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)
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#ifdef CONFIG_SOFTMMU
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@ -424,6 +424,11 @@ void tcg_prologue_init(TCGContext *s)
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qemu_log_unlock();
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}
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#endif
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/* Assert that goto_ptr is implemented completely. */
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if (TCG_TARGET_HAS_goto_ptr) {
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tcg_debug_assert(s->code_gen_epilogue != NULL);
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}
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}
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void tcg_func_start(TCGContext *s)
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@ -699,6 +699,7 @@ struct TCGContext {
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extension that allows arithmetic on void*. */
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int code_gen_max_blocks;
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void *code_gen_prologue;
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void *code_gen_epilogue;
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void *code_gen_buffer;
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size_t code_gen_buffer_size;
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void *code_gen_ptr;
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@ -85,6 +85,7 @@
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#define TCG_TARGET_HAS_muls2_i32 0
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_goto_ptr 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_extrl_i64_i32 0
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