Fix OMAP1 MPUI/O keyboard interrupt masking.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3796 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -10,7 +10,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
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/* pflash_cfi02.c */
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
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BlockDriverState *bs, target_ulong sector_len,
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BlockDriverState *bs, uint32_t sector_len,
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int nb_blocs, int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3);
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@ -3576,8 +3576,8 @@ static void omap_mpuio_kbd_update(struct omap_mpuio_s *s)
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if (*row & cols)
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rows |= i;
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qemu_set_irq(s->kbd_irq, rows && ~s->kbd_mask && s->clk);
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s->row_latch = rows ^ 0x1f;
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qemu_set_irq(s->kbd_irq, rows && !s->kbd_mask && s->clk);
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s->row_latch = ~rows;
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}
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static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
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@ -3609,7 +3609,7 @@ static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
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return s->edge;
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case 0x20: /* KBD_INT */
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return (s->row_latch != 0x1f) && !s->kbd_mask;
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return (~s->row_latch & 0x1f) && !s->kbd_mask;
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case 0x24: /* GPIO_INT */
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ret = s->ints;
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@ -525,7 +525,7 @@ static int ctz32 (uint32_t n)
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}
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
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BlockDriverState *bs, target_ulong sector_len,
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BlockDriverState *bs, uint32_t sector_len,
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int nb_blocs, int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3)
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