Fix OMAP pic handling of simultaneous interrupts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3095 c046a42c-6fe2-441c-8c8c-71466251a162
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hw/omap.c
22
hw/omap.c
@ -70,16 +70,20 @@ struct omap_intr_handler_s {
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static void omap_inth_update(struct omap_intr_handler_s *s)
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{
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uint32_t irq = s->new_irq_agr & s->irqs & ~s->mask & ~s->fiq;
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uint32_t fiq = s->new_fiq_agr & s->irqs & ~s->mask & s->fiq;
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uint32_t irq = s->irqs & ~s->mask & ~s->fiq;
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uint32_t fiq = s->irqs & ~s->mask & s->fiq;
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qemu_set_irq(s->parent_pic[ARM_PIC_CPU_IRQ], irq);
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if (irq)
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s->new_irq_agr = 0;
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if (s->new_irq_agr || !irq) {
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qemu_set_irq(s->parent_pic[ARM_PIC_CPU_IRQ], irq);
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if (irq)
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s->new_irq_agr = 0;
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}
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qemu_set_irq(s->parent_pic[ARM_PIC_CPU_FIQ], fiq);
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if (fiq)
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s->new_fiq_agr = 0;
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if (s->new_fiq_agr || !irq) {
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qemu_set_irq(s->parent_pic[ARM_PIC_CPU_FIQ], fiq);
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if (fiq)
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s->new_fiq_agr = 0;
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}
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}
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static void omap_inth_sir_update(struct omap_intr_handler_s *s)
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@ -124,7 +128,7 @@ static void omap_set_intr(void *opaque, int irq, int req)
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if (req) {
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rise = ~ih->irqs & (1 << irq);
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ih->irqs |= rise;
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ih->stats[irq] ++;
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ih->stats[irq] += !!rise;
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} else {
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rise = ih->sens_edge & ih->irqs & (1 << irq);
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ih->irqs &= ~rise;
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