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mos6522: add defines for IFR bit flags

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These are intended to make it easier to see how the physical control lines
are wired for each instance.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220305150957.5053-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2022-03-05 15:09:46 +00:00
parent 9f0369efb0
commit d05bacbf76
1 changed files with 15 additions and 7 deletions
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22
include/hw/misc/mos6522.h
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@ -41,13 +41,21 @@
#define IER_SET 0x80 /* set bits in IER */
#define IER_CLR 0 /* clear bits in IER */
#define CA2_INT 0x01
#define CA1_INT 0x02
#define SR_INT 0x04 /* Shift register full/empty */
#define CB2_INT 0x08
#define CB1_INT 0x10
#define T2_INT 0x20 /* Timer 2 interrupt */
#define T1_INT 0x40 /* Timer 1 interrupt */
#define CA2_INT_BIT 0
#define CA1_INT_BIT 1
#define SR_INT_BIT 2 /* Shift register full/empty */
#define CB2_INT_BIT 3
#define CB1_INT_BIT 4
#define T2_INT_BIT 5 /* Timer 2 interrupt */
#define T1_INT_BIT 6 /* Timer 1 interrupt */
#define CA2_INT BIT(CA2_INT_BIT)
#define CA1_INT BIT(CA1_INT_BIT)
#define SR_INT BIT(SR_INT_BIT)
#define CB2_INT BIT(CB2_INT_BIT)
#define CB1_INT BIT(CB1_INT_BIT)
#define T2_INT BIT(T2_INT_BIT)
#define T1_INT BIT(T1_INT_BIT)
/* Bits in ACR */
#define T1MODE 0xc0 /* Timer 1 mode */