diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index c4cfb75020..418ec4ee56 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -497,9 +497,9 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) piix4_pm_add_properties(s); } -PIIX4PMState *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - bool smm_enabled) +PIIX4PMState *piix4_pm_initfn(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + bool smm_enabled) { PCIDevice *pci_dev; DeviceState *dev; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 3359b40f54..fde0fdc088 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -283,9 +283,9 @@ static void pc_init1(MachineState *machine, PIIX4PMState *piix4_pm; smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - piix4_pm = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, - x86ms->gsi[9], smi_irq, - x86_machine_is_smm_enabled(x86ms)); + piix4_pm = piix4_pm_initfn(pci_bus, piix3_devfn + 3, 0xb100, + x86ms->gsi[9], smi_irq, + x86_machine_is_smm_enabled(x86ms)); pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); /* TODO: Populate SPD eeprom data. */ smbus_eeprom_init(pcms->smbus, 8, NULL, 0); diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 7d9bedd1bb..33a7015ea3 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -311,9 +311,9 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) pci_create_simple(pci_bus, devfn + 2, "piix4-usb-uhci"); if (smbus) { - pms = piix4_pm_init(pci_bus, devfn + 3, 0x1100, - qdev_get_gpio_in_named(dev, "isa", 9), - NULL, 0); + pms = piix4_pm_initfn(pci_bus, devfn + 3, 0x1100, + qdev_get_gpio_in_named(dev, "isa", 9), + NULL, 0); *smbus = I2C_BUS(qdev_get_child_bus(DEVICE(pms), "i2c")); } diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index a362ec7484..f75a4adf5f 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -16,9 +16,9 @@ #include "qom/object.h" #include "hw/acpi/piix4.h" -PIIX4PMState *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - bool smm_enabled); +PIIX4PMState *piix4_pm_initfn(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + bool smm_enabled); /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60