Make MIPS MT implementation more cache friendly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
577d8dd437
commit
d0dc7dc327
12
gdbstub.c
12
gdbstub.c
@ -610,17 +610,17 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
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ptr = mem_buf;
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for (i = 0; i < 32; i++)
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{
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*(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
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*(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
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ptr += sizeof(target_ulong);
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}
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*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
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ptr += sizeof(target_ulong);
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*(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
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*(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
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ptr += sizeof(target_ulong);
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*(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
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*(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
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ptr += sizeof(target_ulong);
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*(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
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@ -687,17 +687,17 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
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ptr = mem_buf;
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for (i = 0; i < 32; i++)
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{
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env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
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env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
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ptr += sizeof(target_ulong);
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}
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env->CP0_Status = tswapl(*(target_ulong *)ptr);
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ptr += sizeof(target_ulong);
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env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
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env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
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ptr += sizeof(target_ulong);
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env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
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env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
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ptr += sizeof(target_ulong);
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env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
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@ -1522,7 +1522,7 @@ void cpu_loop(CPUMIPSState *env)
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trapnr = cpu_mips_exec(env);
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switch(trapnr) {
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case EXCP_SYSCALL:
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syscall_num = env->gpr[2][env->current_tc] - 4000;
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syscall_num = env->gpr[env->current_tc][2] - 4000;
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env->PC[env->current_tc] += 4;
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if (syscall_num >= sizeof(mips_syscall_args)) {
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ret = -ENOSYS;
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@ -1532,7 +1532,7 @@ void cpu_loop(CPUMIPSState *env)
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abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
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nb_args = mips_syscall_args[syscall_num];
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sp_reg = env->gpr[29][env->current_tc];
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sp_reg = env->gpr[env->current_tc][29];
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switch (nb_args) {
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/* these arguments are taken from the stack */
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/* FIXME - what to do if get_user() fails? */
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@ -1543,20 +1543,20 @@ void cpu_loop(CPUMIPSState *env)
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default:
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break;
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}
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ret = do_syscall(env, env->gpr[2][env->current_tc],
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env->gpr[4][env->current_tc],
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env->gpr[5][env->current_tc],
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env->gpr[6][env->current_tc],
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env->gpr[7][env->current_tc],
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ret = do_syscall(env, env->gpr[env->current_tc][2],
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env->gpr[env->current_tc][4],
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env->gpr[env->current_tc][5],
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env->gpr[env->current_tc][6],
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env->gpr[env->current_tc][7],
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arg5, arg6/*, arg7, arg8*/);
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}
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if ((unsigned int)ret >= (unsigned int)(-1133)) {
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env->gpr[7][env->current_tc] = 1; /* error flag */
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env->gpr[env->current_tc][7] = 1; /* error flag */
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ret = -ret;
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} else {
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env->gpr[7][env->current_tc] = 0; /* error flag */
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env->gpr[env->current_tc][7] = 0; /* error flag */
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}
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env->gpr[2][env->current_tc] = ret;
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env->gpr[env->current_tc][2] = ret;
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break;
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case EXCP_TLBL:
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case EXCP_TLBS:
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@ -2296,7 +2296,7 @@ int main(int argc, char **argv)
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int i;
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for(i = 0; i < 32; i++) {
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env->gpr[i][env->current_tc] = regs->regs[i];
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env->gpr[env->current_tc][i] = regs->regs[i];
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}
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env->PC[env->current_tc] = regs->cp0_epc;
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}
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@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
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static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
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{
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return state->gpr[29][state->current_tc];
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return state->gpr[state->current_tc][29];
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}
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#endif /* TARGET_SIGNAL_H */
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@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
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static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
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{
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return state->gpr[29][state->current_tc];
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return state->gpr[state->current_tc][29];
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}
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#endif /* TARGET_SIGNAL_H */
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@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
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static inline target_ulong get_sp_from_cpustate(CPUMIPSState *state)
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{
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return state->gpr[29][state->current_tc];
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return state->gpr[state->current_tc][29];
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}
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#endif /* TARGET_SIGNAL_H */
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@ -2131,7 +2131,7 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
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err |= __put_user(regs->PC[regs->current_tc], &sc->sc_pc);
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#define save_gp_reg(i) do { \
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err |= __put_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
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err |= __put_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
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} while(0)
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__put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
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save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
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@ -2144,8 +2144,8 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
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save_gp_reg(31);
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#undef save_gp_reg
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err |= __put_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
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err |= __put_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
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err |= __put_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
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err |= __put_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
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/* Not used yet, but might be useful if we ever have DSP suppport */
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#if 0
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@ -2205,11 +2205,11 @@ restore_sigcontext(CPUState *regs, struct target_sigcontext *sc)
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err |= __get_user(regs->CP0_EPC, &sc->sc_pc);
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err |= __get_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
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err |= __get_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
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err |= __get_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
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err |= __get_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
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#define restore_gp_reg(i) do { \
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err |= __get_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
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err |= __get_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
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} while(0)
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restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
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restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
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@ -2275,7 +2275,7 @@ get_sigframe(struct emulated_sigaction *ka, CPUState *regs, size_t frame_size)
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unsigned long sp;
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/* Default to using normal stack */
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sp = regs->gpr[29][regs->current_tc];
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sp = regs->gpr[regs->current_tc][29];
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/*
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* FPU emulator may have it's own trampoline active just
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@ -2324,15 +2324,15 @@ static void setup_frame(int sig, struct emulated_sigaction * ka,
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* $25 and PC point to the signal handler, $29 points to the
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* struct sigframe.
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*/
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regs->gpr[ 4][regs->current_tc] = sig;
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regs->gpr[ 5][regs->current_tc] = 0;
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regs->gpr[ 6][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_sc);
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regs->gpr[29][regs->current_tc] = frame_addr;
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regs->gpr[31][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_code);
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regs->gpr[regs->current_tc][ 4] = sig;
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regs->gpr[regs->current_tc][ 5] = 0;
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regs->gpr[regs->current_tc][ 6] = frame_addr + offsetof(struct sigframe, sf_sc);
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regs->gpr[regs->current_tc][29] = frame_addr;
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regs->gpr[regs->current_tc][31] = frame_addr + offsetof(struct sigframe, sf_code);
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/* The original kernel code sets CP0_EPC to the handler
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* since it returns to userland using eret
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* we cannot do this here, and we must set PC directly */
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regs->PC[regs->current_tc] = regs->gpr[25][regs->current_tc] = ka->sa._sa_handler;
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regs->PC[regs->current_tc] = regs->gpr[regs->current_tc][25] = ka->sa._sa_handler;
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unlock_user_struct(frame, frame_addr, 1);
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return;
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@ -2353,7 +2353,7 @@ long do_sigreturn(CPUState *regs)
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#if defined(DEBUG_SIGNAL)
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fprintf(stderr, "do_sigreturn\n");
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#endif
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frame_addr = regs->gpr[29][regs->current_tc];
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frame_addr = regs->gpr[regs->current_tc][29];
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if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1))
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goto badframe;
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@ -2752,8 +2752,8 @@ int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp)
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/* ??? is this sufficient? */
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#elif defined(TARGET_MIPS)
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if (!newsp)
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newsp = env->gpr[29][env->current_tc];
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new_env->gpr[29][env->current_tc] = newsp;
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newsp = env->gpr[env->current_tc][29];
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new_env->gpr[env->current_tc][29] = newsp;
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#elif defined(TARGET_PPC)
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if (!newsp)
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newsp = env->gpr[1];
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@ -3512,7 +3512,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
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if (!is_error(ret)) {
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#if defined(TARGET_MIPS)
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CPUMIPSState *env = (CPUMIPSState*)cpu_env;
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env->gpr[3][env->current_tc] = host_pipe[1];
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env->gpr[env->current_tc][3] = host_pipe[1];
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ret = host_pipe[0];
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#else
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if (put_user_s32(host_pipe[0], arg1)
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@ -142,7 +142,7 @@ typedef struct mips_def_t mips_def_t;
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typedef struct CPUMIPSState CPUMIPSState;
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struct CPUMIPSState {
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/* General integer registers */
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target_ulong gpr[32][MIPS_SHADOW_SET_MAX];
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target_ulong gpr[MIPS_SHADOW_SET_MAX][32];
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/* Special registers */
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target_ulong PC[MIPS_TC_MAX];
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#if TARGET_LONG_BITS > HOST_LONG_BITS
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@ -150,9 +150,9 @@ struct CPUMIPSState {
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target_ulong t1;
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target_ulong t2;
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#endif
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target_ulong HI[MIPS_DSP_ACC][MIPS_TC_MAX];
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target_ulong LO[MIPS_DSP_ACC][MIPS_TC_MAX];
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target_ulong ACX[MIPS_DSP_ACC][MIPS_TC_MAX];
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target_ulong HI[MIPS_TC_MAX][MIPS_DSP_ACC];
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target_ulong LO[MIPS_TC_MAX][MIPS_DSP_ACC];
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target_ulong ACX[MIPS_TC_MAX][MIPS_DSP_ACC];
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target_ulong DSPControl[MIPS_TC_MAX];
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CPUMIPSMVPContext *mvp;
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@ -255,25 +255,25 @@ void op_dup_T0 (void)
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void op_load_HI (void)
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{
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T0 = env->HI[PARAM1][env->current_tc];
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T0 = env->HI[env->current_tc][PARAM1];
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FORCE_RET();
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}
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void op_store_HI (void)
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{
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env->HI[PARAM1][env->current_tc] = T0;
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env->HI[env->current_tc][PARAM1] = T0;
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FORCE_RET();
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}
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void op_load_LO (void)
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{
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T0 = env->LO[PARAM1][env->current_tc];
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T0 = env->LO[env->current_tc][PARAM1];
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FORCE_RET();
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}
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void op_store_LO (void)
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{
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env->LO[PARAM1][env->current_tc] = T0;
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env->LO[env->current_tc][PARAM1] = T0;
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FORCE_RET();
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}
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@ -368,8 +368,8 @@ void op_div (void)
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void op_div (void)
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{
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if (T1 != 0) {
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env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
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env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
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env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
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env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
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}
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FORCE_RET();
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}
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@ -378,8 +378,8 @@ void op_div (void)
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void op_divu (void)
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{
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if (T1 != 0) {
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env->LO[0][env->current_tc] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
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env->HI[0][env->current_tc] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
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env->LO[env->current_tc][0] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
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env->HI[env->current_tc][0] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
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}
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FORCE_RET();
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}
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@ -447,8 +447,8 @@ void op_ddivu (void)
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void op_ddivu (void)
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{
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if (T1 != 0) {
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env->LO[0][env->current_tc] = T0 / T1;
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env->HI[0][env->current_tc] = T0 % T1;
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env->LO[env->current_tc][0] = T0 / T1;
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env->HI[env->current_tc][0] = T0 % T1;
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}
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FORCE_RET();
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}
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@ -869,26 +869,26 @@ void op_mulshiu (void)
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static always_inline uint64_t get_HILO (void)
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{
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return ((uint64_t)env->HI[0][env->current_tc] << 32) |
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((uint64_t)(uint32_t)env->LO[0][env->current_tc]);
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return ((uint64_t)env->HI[env->current_tc][0] << 32) |
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((uint64_t)(uint32_t)env->LO[env->current_tc][0]);
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}
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static always_inline void set_HILO (uint64_t HILO)
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{
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env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
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env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
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env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
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env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
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}
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static always_inline void set_HIT0_LO (uint64_t HILO)
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{
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env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
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T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
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env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
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T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
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}
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static always_inline void set_HI_LOT0 (uint64_t HILO)
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{
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T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
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env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
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T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
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env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
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}
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void op_mult (void)
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@ -1029,13 +1029,13 @@ void op_mulshiu (void)
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#if defined(TARGET_MIPS64)
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void op_dmult (void)
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{
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CALL_FROM_TB4(muls64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
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CALL_FROM_TB4(muls64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
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FORCE_RET();
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}
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void op_dmultu (void)
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{
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CALL_FROM_TB4(mulu64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
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CALL_FROM_TB4(mulu64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
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FORCE_RET();
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}
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#endif
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@ -1044,14 +1044,14 @@ void op_dmultu (void)
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void op_movn (void)
|
||||
{
|
||||
if (T1 != 0)
|
||||
env->gpr[PARAM1][env->current_tc] = T0;
|
||||
env->gpr[env->current_tc][PARAM1] = T0;
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
void op_movz (void)
|
||||
{
|
||||
if (T1 == 0)
|
||||
env->gpr[PARAM1][env->current_tc] = T0;
|
||||
env->gpr[env->current_tc][PARAM1] = T0;
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
|
@ -163,25 +163,25 @@ void do_dclz (void)
|
||||
#if TARGET_LONG_BITS > HOST_LONG_BITS
|
||||
static always_inline uint64_t get_HILO (void)
|
||||
{
|
||||
return (env->HI[0][env->current_tc] << 32) | (uint32_t)env->LO[0][env->current_tc];
|
||||
return (env->HI[env->current_tc][0] << 32) | (uint32_t)env->LO[env->current_tc][0];
|
||||
}
|
||||
|
||||
static always_inline void set_HILO (uint64_t HILO)
|
||||
{
|
||||
env->LO[0][env->current_tc] = (int32_t)HILO;
|
||||
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
|
||||
env->LO[env->current_tc][0] = (int32_t)HILO;
|
||||
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
|
||||
}
|
||||
|
||||
static always_inline void set_HIT0_LO (uint64_t HILO)
|
||||
{
|
||||
env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
|
||||
T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
|
||||
env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
|
||||
T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
|
||||
}
|
||||
|
||||
static always_inline void set_HI_LOT0 (uint64_t HILO)
|
||||
{
|
||||
T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
|
||||
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
|
||||
T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
|
||||
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
|
||||
}
|
||||
|
||||
void do_mult (void)
|
||||
@ -303,8 +303,8 @@ void do_div (void)
|
||||
{
|
||||
/* 64bit datatypes because we may see overflow/underflow. */
|
||||
if (T1 != 0) {
|
||||
env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
|
||||
env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
|
||||
env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
|
||||
env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -316,12 +316,12 @@ void do_ddiv (void)
|
||||
int64_t arg0 = (int64_t)T0;
|
||||
int64_t arg1 = (int64_t)T1;
|
||||
if (arg0 == ((int64_t)-1 << 63) && arg1 == (int64_t)-1) {
|
||||
env->LO[0][env->current_tc] = arg0;
|
||||
env->HI[0][env->current_tc] = 0;
|
||||
env->LO[env->current_tc][0] = arg0;
|
||||
env->HI[env->current_tc][0] = 0;
|
||||
} else {
|
||||
lldiv_t res = lldiv(arg0, arg1);
|
||||
env->LO[0][env->current_tc] = res.quot;
|
||||
env->HI[0][env->current_tc] = res.rem;
|
||||
env->LO[env->current_tc][0] = res.quot;
|
||||
env->HI[env->current_tc][0] = res.rem;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -330,8 +330,8 @@ void do_ddiv (void)
|
||||
void do_ddivu (void)
|
||||
{
|
||||
if (T1 != 0) {
|
||||
env->LO[0][env->current_tc] = T0 / T1;
|
||||
env->HI[0][env->current_tc] = T0 % T1;
|
||||
env->LO[env->current_tc][0] = T0 / T1;
|
||||
env->HI[env->current_tc][0] = T0 % T1;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -627,21 +627,21 @@ void do_pmon (int function)
|
||||
function /= 2;
|
||||
switch (function) {
|
||||
case 2: /* TODO: char inbyte(int waitflag); */
|
||||
if (env->gpr[4][env->current_tc] == 0)
|
||||
env->gpr[2][env->current_tc] = -1;
|
||||
if (env->gpr[env->current_tc][4] == 0)
|
||||
env->gpr[env->current_tc][2] = -1;
|
||||
/* Fall through */
|
||||
case 11: /* TODO: char inbyte (void); */
|
||||
env->gpr[2][env->current_tc] = -1;
|
||||
env->gpr[env->current_tc][2] = -1;
|
||||
break;
|
||||
case 3:
|
||||
case 12:
|
||||
printf("%c", (char)(env->gpr[4][env->current_tc] & 0xFF));
|
||||
printf("%c", (char)(env->gpr[env->current_tc][4] & 0xFF));
|
||||
break;
|
||||
case 17:
|
||||
break;
|
||||
case 158:
|
||||
{
|
||||
unsigned char *fmt = (void *)(unsigned long)env->gpr[4][env->current_tc];
|
||||
unsigned char *fmt = (void *)(unsigned long)env->gpr[env->current_tc][4];
|
||||
printf("%s", fmt);
|
||||
}
|
||||
break;
|
||||
|
@ -21,31 +21,31 @@
|
||||
#if defined(REG)
|
||||
void glue(op_load_gpr_T0_gpr, REG) (void)
|
||||
{
|
||||
T0 = env->gpr[REG][env->current_tc];
|
||||
T0 = env->gpr[env->current_tc][REG];
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
void glue(op_store_T0_gpr_gpr, REG) (void)
|
||||
{
|
||||
env->gpr[REG][env->current_tc] = T0;
|
||||
env->gpr[env->current_tc][REG] = T0;
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
void glue(op_load_gpr_T1_gpr, REG) (void)
|
||||
{
|
||||
T1 = env->gpr[REG][env->current_tc];
|
||||
T1 = env->gpr[env->current_tc][REG];
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
void glue(op_store_T1_gpr_gpr, REG) (void)
|
||||
{
|
||||
env->gpr[REG][env->current_tc] = T1;
|
||||
env->gpr[env->current_tc][REG] = T1;
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
void glue(op_load_gpr_T2_gpr, REG) (void)
|
||||
{
|
||||
T2 = env->gpr[REG][env->current_tc];
|
||||
T2 = env->gpr[env->current_tc][REG];
|
||||
FORCE_RET();
|
||||
}
|
||||
|
||||
|
@ -6811,7 +6811,7 @@ void dump_fpu (CPUState *env)
|
||||
{
|
||||
if (loglevel) {
|
||||
fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
|
||||
env->PC[env->current_tc], env->HI[0][env->current_tc], env->LO[0][env->current_tc], env->hflags, env->btarget, env->bcond);
|
||||
env->PC[env->current_tc], env->HI[env->current_tc][0], env->LO[env->current_tc][0], env->hflags, env->btarget, env->bcond);
|
||||
fpu_dump_state(env, logfile, fprintf, 0);
|
||||
}
|
||||
}
|
||||
@ -6830,16 +6830,16 @@ void cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
|
||||
|
||||
if (!SIGN_EXT_P(env->PC[env->current_tc]))
|
||||
cpu_fprintf(f, "BROKEN: pc=0x" TARGET_FMT_lx "\n", env->PC[env->current_tc]);
|
||||
if (!SIGN_EXT_P(env->HI[0][env->current_tc]))
|
||||
cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[0][env->current_tc]);
|
||||
if (!SIGN_EXT_P(env->LO[0][env->current_tc]))
|
||||
cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[0][env->current_tc]);
|
||||
if (!SIGN_EXT_P(env->HI[env->current_tc][0]))
|
||||
cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[env->current_tc][0]);
|
||||
if (!SIGN_EXT_P(env->LO[env->current_tc][0]))
|
||||
cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[env->current_tc][0]);
|
||||
if (!SIGN_EXT_P(env->btarget))
|
||||
cpu_fprintf(f, "BROKEN: btarget=0x" TARGET_FMT_lx "\n", env->btarget);
|
||||
|
||||
for (i = 0; i < 32; i++) {
|
||||
if (!SIGN_EXT_P(env->gpr[i][env->current_tc]))
|
||||
cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[i][env->current_tc]);
|
||||
if (!SIGN_EXT_P(env->gpr[env->current_tc][i]))
|
||||
cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[env->current_tc][i]);
|
||||
}
|
||||
|
||||
if (!SIGN_EXT_P(env->CP0_EPC))
|
||||
@ -6860,7 +6860,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
|
||||
for (i = 0; i < 32; i++) {
|
||||
if ((i & 3) == 0)
|
||||
cpu_fprintf(f, "GPR%02d:", i);
|
||||
cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[i][env->current_tc]);
|
||||
cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[env->current_tc][i]);
|
||||
if ((i & 3) == 3)
|
||||
cpu_fprintf(f, "\n");
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user