aspeed/smc: Introduce segment operations
AST2600 will use a different encoding for the addresses defined in the Segment Register. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-13-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -211,6 +211,10 @@ static const AspeedSegments aspeed_segments_ast2500_spi2[] = {
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{ 0x38000000, 32 * 1024 * 1024 }, /* start address is readonly */
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{ 0x38000000, 32 * 1024 * 1024 }, /* start address is readonly */
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{ 0x3A000000, 96 * 1024 * 1024 }, /* end address is readonly */
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{ 0x3A000000, 96 * 1024 * 1024 }, /* end address is readonly */
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};
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};
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static uint32_t aspeed_smc_segment_to_reg(const AspeedSMCState *s,
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const AspeedSegments *seg);
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static void aspeed_smc_reg_to_segment(const AspeedSMCState *s, uint32_t reg,
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AspeedSegments *seg);
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static const AspeedSMCController controllers[] = {
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static const AspeedSMCController controllers[] = {
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{
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{
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@ -226,6 +230,8 @@ static const AspeedSMCController controllers[] = {
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.flash_window_size = 0x6000000,
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.flash_window_size = 0x6000000,
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.has_dma = false,
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.has_dma = false,
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.nregs = ASPEED_SMC_R_SMC_MAX,
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.nregs = ASPEED_SMC_R_SMC_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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}, {
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}, {
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.name = "aspeed.fmc-ast2400",
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.name = "aspeed.fmc-ast2400",
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.r_conf = R_CONF,
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.r_conf = R_CONF,
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@ -241,6 +247,8 @@ static const AspeedSMCController controllers[] = {
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.dma_flash_mask = 0x0FFFFFFC,
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.dma_flash_mask = 0x0FFFFFFC,
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.dma_dram_mask = 0x1FFFFFFC,
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.dma_dram_mask = 0x1FFFFFFC,
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.nregs = ASPEED_SMC_R_MAX,
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.nregs = ASPEED_SMC_R_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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}, {
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}, {
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.name = "aspeed.spi1-ast2400",
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.name = "aspeed.spi1-ast2400",
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.r_conf = R_SPI_CONF,
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.r_conf = R_SPI_CONF,
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@ -254,6 +262,8 @@ static const AspeedSMCController controllers[] = {
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.flash_window_size = 0x10000000,
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.flash_window_size = 0x10000000,
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.has_dma = false,
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.has_dma = false,
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.nregs = ASPEED_SMC_R_SPI_MAX,
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.nregs = ASPEED_SMC_R_SPI_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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}, {
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}, {
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.name = "aspeed.fmc-ast2500",
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.name = "aspeed.fmc-ast2500",
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.r_conf = R_CONF,
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.r_conf = R_CONF,
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@ -269,6 +279,8 @@ static const AspeedSMCController controllers[] = {
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.dma_flash_mask = 0x0FFFFFFC,
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.dma_flash_mask = 0x0FFFFFFC,
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.dma_dram_mask = 0x3FFFFFFC,
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.dma_dram_mask = 0x3FFFFFFC,
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.nregs = ASPEED_SMC_R_MAX,
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.nregs = ASPEED_SMC_R_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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}, {
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}, {
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.name = "aspeed.spi1-ast2500",
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.name = "aspeed.spi1-ast2500",
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.r_conf = R_CONF,
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.r_conf = R_CONF,
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@ -282,6 +294,8 @@ static const AspeedSMCController controllers[] = {
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.flash_window_size = 0x8000000,
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.flash_window_size = 0x8000000,
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.has_dma = false,
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.has_dma = false,
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.nregs = ASPEED_SMC_R_MAX,
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.nregs = ASPEED_SMC_R_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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}, {
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}, {
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.name = "aspeed.spi2-ast2500",
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.name = "aspeed.spi2-ast2500",
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.r_conf = R_CONF,
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.r_conf = R_CONF,
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@ -295,19 +309,19 @@ static const AspeedSMCController controllers[] = {
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.flash_window_size = 0x8000000,
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.flash_window_size = 0x8000000,
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.has_dma = false,
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.has_dma = false,
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.nregs = ASPEED_SMC_R_MAX,
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.nregs = ASPEED_SMC_R_MAX,
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.segment_to_reg = aspeed_smc_segment_to_reg,
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.reg_to_segment = aspeed_smc_reg_to_segment,
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},
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},
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};
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};
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/*
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/*
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* The Segment Register uses a 8MB unit to encode the start address
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* The Segment Registers of the AST2400 and AST2500 have a 8MB
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* and the end address of the mapping window of a flash SPI slave :
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* unit. The address range of a flash SPI slave is encoded with
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*
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* absolute addresses which should be part of the overall controller
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* | byte 1 | byte 2 | byte 3 | byte 4 |
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* window.
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* +--------+--------+--------+--------+
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* | end | start | 0 | 0 |
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*
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*/
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*/
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static inline uint32_t aspeed_smc_segment_to_reg(const AspeedSegments *seg)
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static uint32_t aspeed_smc_segment_to_reg(const AspeedSMCState *s,
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const AspeedSegments *seg)
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{
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{
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uint32_t reg = 0;
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uint32_t reg = 0;
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reg |= ((seg->addr >> 23) & SEG_START_MASK) << SEG_START_SHIFT;
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reg |= ((seg->addr >> 23) & SEG_START_MASK) << SEG_START_SHIFT;
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@ -315,7 +329,8 @@ static inline uint32_t aspeed_smc_segment_to_reg(const AspeedSegments *seg)
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return reg;
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return reg;
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}
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}
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static inline void aspeed_smc_reg_to_segment(uint32_t reg, AspeedSegments *seg)
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static void aspeed_smc_reg_to_segment(const AspeedSMCState *s,
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uint32_t reg, AspeedSegments *seg)
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{
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{
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seg->addr = ((reg >> SEG_START_SHIFT) & SEG_START_MASK) << 23;
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seg->addr = ((reg >> SEG_START_SHIFT) & SEG_START_MASK) << 23;
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seg->size = (((reg >> SEG_END_SHIFT) & SEG_END_MASK) << 23) - seg->addr;
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seg->size = (((reg >> SEG_END_SHIFT) & SEG_END_MASK) << 23) - seg->addr;
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@ -333,7 +348,7 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s,
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continue;
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continue;
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}
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}
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aspeed_smc_reg_to_segment(s->regs[R_SEG_ADDR0 + i], &seg);
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s->ctrl->reg_to_segment(s, s->regs[R_SEG_ADDR0 + i], &seg);
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if (new->addr + new->size > seg.addr &&
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if (new->addr + new->size > seg.addr &&
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new->addr < seg.addr + seg.size) {
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new->addr < seg.addr + seg.size) {
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@ -354,7 +369,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
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AspeedSMCFlash *fl = &s->flashes[cs];
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AspeedSMCFlash *fl = &s->flashes[cs];
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AspeedSegments seg;
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AspeedSegments seg;
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aspeed_smc_reg_to_segment(new, &seg);
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s->ctrl->reg_to_segment(s, new, &seg);
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/* The start address of CS0 is read-only */
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/* The start address of CS0 is read-only */
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if (cs == 0 && seg.addr != s->ctrl->flash_window_base) {
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if (cs == 0 && seg.addr != s->ctrl->flash_window_base) {
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@ -362,7 +377,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
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"%s: Tried to change CS0 start address to 0x%"
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"%s: Tried to change CS0 start address to 0x%"
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HWADDR_PRIx "\n", s->ctrl->name, seg.addr);
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HWADDR_PRIx "\n", s->ctrl->name, seg.addr);
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seg.addr = s->ctrl->flash_window_base;
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seg.addr = s->ctrl->flash_window_base;
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new = aspeed_smc_segment_to_reg(&seg);
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new = s->ctrl->segment_to_reg(s, &seg);
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}
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}
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/*
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/*
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@ -379,7 +394,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs,
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HWADDR_PRIx "\n", s->ctrl->name, cs, seg.addr + seg.size);
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HWADDR_PRIx "\n", s->ctrl->name, cs, seg.addr + seg.size);
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seg.size = s->ctrl->segments[cs].addr + s->ctrl->segments[cs].size -
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seg.size = s->ctrl->segments[cs].addr + s->ctrl->segments[cs].size -
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seg.addr;
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seg.addr;
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new = aspeed_smc_segment_to_reg(&seg);
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new = s->ctrl->segment_to_reg(s, &seg);
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}
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}
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/* Keep the segment in the overall flash window */
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/* Keep the segment in the overall flash window */
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@ -509,7 +524,7 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl,
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const AspeedSMCState *s = fl->controller;
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const AspeedSMCState *s = fl->controller;
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AspeedSegments seg;
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AspeedSegments seg;
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aspeed_smc_reg_to_segment(s->regs[R_SEG_ADDR0 + fl->id], &seg);
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s->ctrl->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->id], &seg);
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if ((addr % seg.size) != addr) {
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if ((addr % seg.size) != addr) {
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qemu_log_mask(LOG_GUEST_ERROR,
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: invalid address 0x%08x for CS%d segment : "
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"%s: invalid address 0x%08x for CS%d segment : "
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@ -769,7 +784,7 @@ static void aspeed_smc_reset(DeviceState *d)
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/* setup default segment register values for all */
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/* setup default segment register values for all */
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for (i = 0; i < s->ctrl->max_slaves; ++i) {
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for (i = 0; i < s->ctrl->max_slaves; ++i) {
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s->regs[R_SEG_ADDR0 + i] =
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s->regs[R_SEG_ADDR0 + i] =
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aspeed_smc_segment_to_reg(&s->ctrl->segments[i]);
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s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]);
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}
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}
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/* HW strapping flash type for FMC controllers */
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/* HW strapping flash type for FMC controllers */
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@ -49,6 +49,10 @@ typedef struct AspeedSMCController {
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hwaddr dma_flash_mask;
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hwaddr dma_flash_mask;
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hwaddr dma_dram_mask;
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hwaddr dma_dram_mask;
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uint32_t nregs;
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uint32_t nregs;
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uint32_t (*segment_to_reg)(const struct AspeedSMCState *s,
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const AspeedSegments *seg);
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void (*reg_to_segment)(const struct AspeedSMCState *s, uint32_t reg,
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AspeedSegments *seg);
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} AspeedSMCController;
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} AspeedSMCController;
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typedef struct AspeedSMCFlash {
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typedef struct AspeedSMCFlash {
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