target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
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611d4f996f
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@ -38,6 +38,8 @@
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#define POWERPC_CPU_GET_CLASS(obj) \
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#define POWERPC_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
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OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
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typedef struct PowerPCCPU PowerPCCPU;
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/**
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/**
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* PowerPCCPUClass:
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* PowerPCCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_realize: The parent class' realize handler.
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@ -71,7 +73,7 @@ typedef struct PowerPCCPUClass {
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void (*init_proc)(CPUPPCState *env);
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void (*init_proc)(CPUPPCState *env);
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int (*check_pow)(CPUPPCState *env);
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int (*check_pow)(CPUPPCState *env);
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#if defined(CONFIG_SOFTMMU)
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#if defined(CONFIG_SOFTMMU)
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int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
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int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
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int mmu_idx);
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int mmu_idx);
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#endif
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#endif
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} PowerPCCPUClass;
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} PowerPCCPUClass;
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@ -83,14 +85,14 @@ typedef struct PowerPCCPUClass {
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*
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*
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* A PowerPC CPU.
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* A PowerPC CPU.
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*/
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*/
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typedef struct PowerPCCPU {
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struct PowerPCCPU {
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/*< private >*/
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/*< private >*/
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUPPCState env;
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CPUPPCState env;
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int cpu_dt_id;
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int cpu_dt_id;
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} PowerPCCPU;
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};
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static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
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static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
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{
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{
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@ -381,10 +381,11 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
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return (rpn & ~mask) | (eaddr & mask);
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return (rpn & ~mask) | (eaddr & mask);
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}
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}
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int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr, int rwx,
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int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
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int mmu_idx)
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int mmu_idx)
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{
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{
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CPUState *cs = CPU(ppc_env_get_cpu(env));
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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target_ulong sr;
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target_ulong sr;
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hwaddr pte_offset;
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hwaddr pte_offset;
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ppc_hash_pte32_t pte;
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ppc_hash_pte32_t pte;
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@ -5,7 +5,7 @@
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hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash);
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hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash);
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hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
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hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
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int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
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int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
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int mmu_idx);
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int mmu_idx);
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/*
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/*
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@ -454,10 +454,11 @@ static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb, ppc_hash_pte64_t pte,
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return (rpn & ~mask) | (eaddr & mask);
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return (rpn & ~mask) | (eaddr & mask);
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}
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}
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int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr,
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int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
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int rwx, int mmu_idx)
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int rwx, int mmu_idx)
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{
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{
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CPUState *cs = CPU(ppc_env_get_cpu(env));
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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ppc_slb_t *slb;
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ppc_slb_t *slb;
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hwaddr pte_offset;
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hwaddr pte_offset;
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ppc_hash_pte64_t pte;
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ppc_hash_pte64_t pte;
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@ -7,7 +7,7 @@
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void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
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void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
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int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
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int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
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hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
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hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
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int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
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int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
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int mmu_idx);
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int mmu_idx);
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void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
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void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
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target_ulong pte0, target_ulong pte1);
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target_ulong pte0, target_ulong pte1);
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@ -2902,7 +2902,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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int ret;
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int ret;
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if (pcc->handle_mmu_fault) {
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if (pcc->handle_mmu_fault) {
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ret = pcc->handle_mmu_fault(env, addr, is_write, mmu_idx);
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ret = pcc->handle_mmu_fault(cpu, addr, is_write, mmu_idx);
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} else {
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} else {
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ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
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ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
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}
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}
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