ppc: Avoid AREG0 for timebase helpers

Add an explicit CPUPPCState parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Blue Swirl 2012-05-30 04:23:36 +00:00 committed by Alexander Graf
parent 6de673d406
commit d0f1562d6a
5 changed files with 71 additions and 69 deletions

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@ -8,5 +8,4 @@ obj-y += int_helper.o
obj-y += mmu_helper.o
obj-y += timebase_helper.o
$(obj)/timebase_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

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@ -372,39 +372,39 @@ DEF_HELPER_3(divo, tl, env, tl, tl)
DEF_HELPER_3(divs, tl, env, tl, tl)
DEF_HELPER_3(divso, tl, env, tl, tl)
DEF_HELPER_1(load_dcr, tl, tl);
DEF_HELPER_2(store_dcr, void, tl, tl)
DEF_HELPER_2(load_dcr, tl, env, tl);
DEF_HELPER_3(store_dcr, void, env, tl, tl)
DEF_HELPER_1(load_dump_spr, void, i32)
DEF_HELPER_1(store_dump_spr, void, i32)
DEF_HELPER_0(load_tbl, tl)
DEF_HELPER_0(load_tbu, tl)
DEF_HELPER_0(load_atbl, tl)
DEF_HELPER_0(load_atbu, tl)
DEF_HELPER_0(load_601_rtcl, tl)
DEF_HELPER_0(load_601_rtcu, tl)
DEF_HELPER_1(load_tbl, tl, env)
DEF_HELPER_1(load_tbu, tl, env)
DEF_HELPER_1(load_atbl, tl, env)
DEF_HELPER_1(load_atbu, tl, env)
DEF_HELPER_1(load_601_rtcl, tl, env)
DEF_HELPER_1(load_601_rtcu, tl, env)
#if !defined(CONFIG_USER_ONLY)
#if defined(TARGET_PPC64)
DEF_HELPER_1(store_asr, void, tl)
DEF_HELPER_0(load_purr, tl)
DEF_HELPER_1(load_purr, tl, env)
#endif
DEF_HELPER_1(store_sdr1, void, tl)
DEF_HELPER_1(store_tbl, void, tl)
DEF_HELPER_1(store_tbu, void, tl)
DEF_HELPER_1(store_atbl, void, tl)
DEF_HELPER_1(store_atbu, void, tl)
DEF_HELPER_1(store_601_rtcl, void, tl)
DEF_HELPER_1(store_601_rtcu, void, tl)
DEF_HELPER_0(load_decr, tl)
DEF_HELPER_1(store_decr, void, tl)
DEF_HELPER_2(store_tbl, void, env, tl)
DEF_HELPER_2(store_tbu, void, env, tl)
DEF_HELPER_2(store_atbl, void, env, tl)
DEF_HELPER_2(store_atbu, void, env, tl)
DEF_HELPER_2(store_601_rtcl, void, env, tl)
DEF_HELPER_2(store_601_rtcu, void, env, tl)
DEF_HELPER_1(load_decr, tl, env)
DEF_HELPER_2(store_decr, void, env, tl)
DEF_HELPER_1(store_hid0_601, void, tl)
DEF_HELPER_2(store_403_pbr, void, i32, tl)
DEF_HELPER_0(load_40x_pit, tl)
DEF_HELPER_1(store_40x_pit, void, tl)
DEF_HELPER_1(load_40x_pit, tl, env)
DEF_HELPER_2(store_40x_pit, void, env, tl)
DEF_HELPER_1(store_40x_dbcr0, void, tl)
DEF_HELPER_1(store_40x_sler, void, tl)
DEF_HELPER_1(store_booke_tcr, void, tl)
DEF_HELPER_1(store_booke_tsr, void, tl)
DEF_HELPER_2(store_booke_tcr, void, env, tl)
DEF_HELPER_2(store_booke_tsr, void, env, tl)
DEF_HELPER_3(store_ibatl, void, env, i32, tl)
DEF_HELPER_3(store_ibatu, void, env, i32, tl)
DEF_HELPER_3(store_dbatl, void, env, i32, tl)

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@ -17,106 +17,105 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h"
/*****************************************************************************/
/* SPR accesses */
target_ulong helper_load_tbl(void)
target_ulong helper_load_tbl(CPUPPCState *env)
{
return (target_ulong)cpu_ppc_load_tbl(env);
}
target_ulong helper_load_tbu(void)
target_ulong helper_load_tbu(CPUPPCState *env)
{
return cpu_ppc_load_tbu(env);
}
target_ulong helper_load_atbl(void)
target_ulong helper_load_atbl(CPUPPCState *env)
{
return (target_ulong)cpu_ppc_load_atbl(env);
}
target_ulong helper_load_atbu(void)
target_ulong helper_load_atbu(CPUPPCState *env)
{
return cpu_ppc_load_atbu(env);
}
#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
target_ulong helper_load_purr(void)
target_ulong helper_load_purr(CPUPPCState *env)
{
return (target_ulong)cpu_ppc_load_purr(env);
}
#endif
target_ulong helper_load_601_rtcl(void)
target_ulong helper_load_601_rtcl(CPUPPCState *env)
{
return cpu_ppc601_load_rtcl(env);
}
target_ulong helper_load_601_rtcu(void)
target_ulong helper_load_601_rtcu(CPUPPCState *env)
{
return cpu_ppc601_load_rtcu(env);
}
#if !defined(CONFIG_USER_ONLY)
void helper_store_tbl(target_ulong val)
void helper_store_tbl(CPUPPCState *env, target_ulong val)
{
cpu_ppc_store_tbl(env, val);
}
void helper_store_tbu(target_ulong val)
void helper_store_tbu(CPUPPCState *env, target_ulong val)
{
cpu_ppc_store_tbu(env, val);
}
void helper_store_atbl(target_ulong val)
void helper_store_atbl(CPUPPCState *env, target_ulong val)
{
cpu_ppc_store_atbl(env, val);
}
void helper_store_atbu(target_ulong val)
void helper_store_atbu(CPUPPCState *env, target_ulong val)
{
cpu_ppc_store_atbu(env, val);
}
void helper_store_601_rtcl(target_ulong val)
void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
{
cpu_ppc601_store_rtcl(env, val);
}
void helper_store_601_rtcu(target_ulong val)
void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
{
cpu_ppc601_store_rtcu(env, val);
}
target_ulong helper_load_decr(void)
target_ulong helper_load_decr(CPUPPCState *env)
{
return cpu_ppc_load_decr(env);
}
void helper_store_decr(target_ulong val)
void helper_store_decr(CPUPPCState *env, target_ulong val)
{
cpu_ppc_store_decr(env, val);
}
target_ulong helper_load_40x_pit(void)
target_ulong helper_load_40x_pit(CPUPPCState *env)
{
return load_40x_pit(env);
}
void helper_store_40x_pit(target_ulong val)
void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
{
store_40x_pit(env, val);
}
void helper_store_booke_tcr(target_ulong val)
void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
{
store_booke_tcr(env, val);
}
void helper_store_booke_tsr(target_ulong val)
void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
{
store_booke_tsr(env, val);
}
@ -126,7 +125,7 @@ void helper_store_booke_tsr(target_ulong val)
/* Embedded PowerPC specific helpers */
/* XXX: to be improved to check access rights when in user-mode */
target_ulong helper_load_dcr(target_ulong dcrn)
target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
{
uint32_t val = 0;
@ -144,7 +143,7 @@ target_ulong helper_load_dcr(target_ulong dcrn)
return val;
}
void helper_store_dcr(target_ulong dcrn, target_ulong val)
void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
{
if (unlikely(env->dcr_env == NULL)) {
qemu_log("No DCR environment\n");

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@ -5717,7 +5717,7 @@ static void gen_mfdcr(DisasContext *ctx)
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
dcrn = tcg_const_tl(SPR(ctx->opcode));
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], dcrn);
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env, dcrn);
tcg_temp_free(dcrn);
#endif
}
@ -5736,7 +5736,7 @@ static void gen_mtdcr(DisasContext *ctx)
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
dcrn = tcg_const_tl(SPR(ctx->opcode));
gen_helper_store_dcr(dcrn, cpu_gpr[rS(ctx->opcode)]);
gen_helper_store_dcr(cpu_env, dcrn, cpu_gpr[rS(ctx->opcode)]);
tcg_temp_free(dcrn);
#endif
}
@ -5754,7 +5754,8 @@ static void gen_mfdcrx(DisasContext *ctx)
}
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env,
cpu_gpr[rA(ctx->opcode)]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
#endif
}
@ -5772,7 +5773,8 @@ static void gen_mtdcrx(DisasContext *ctx)
}
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_helper_store_dcr(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
gen_helper_store_dcr(cpu_env, cpu_gpr[rA(ctx->opcode)],
cpu_gpr[rS(ctx->opcode)]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
#endif
}
@ -5782,7 +5784,8 @@ static void gen_mfdcrux(DisasContext *ctx)
{
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env,
cpu_gpr[rA(ctx->opcode)]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
}
@ -5791,7 +5794,8 @@ static void gen_mtdcrux(DisasContext *ctx)
{
/* NIP cannot be restored if the memory exception comes from an helper */
gen_update_nip(ctx, ctx->nip - 4);
gen_helper_store_dcr(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
gen_helper_store_dcr(cpu_gpr[rA(ctx->opcode)], cpu_env,
cpu_gpr[rS(ctx->opcode)]);
/* Note: Rc update flag set leads to undefined state of Rc0 */
}

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@ -159,7 +159,7 @@ static void spr_read_decr (void *opaque, int gprn, int sprn)
if (use_icount) {
gen_io_start();
}
gen_helper_load_decr(cpu_gpr[gprn]);
gen_helper_load_decr(cpu_gpr[gprn], cpu_env);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -171,7 +171,7 @@ static void spr_write_decr (void *opaque, int sprn, int gprn)
if (use_icount) {
gen_io_start();
}
gen_helper_store_decr(cpu_gpr[gprn]);
gen_helper_store_decr(cpu_env, cpu_gpr[gprn]);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -186,7 +186,7 @@ static void spr_read_tbl (void *opaque, int gprn, int sprn)
if (use_icount) {
gen_io_start();
}
gen_helper_load_tbl(cpu_gpr[gprn]);
gen_helper_load_tbl(cpu_gpr[gprn], cpu_env);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -198,7 +198,7 @@ static void spr_read_tbu (void *opaque, int gprn, int sprn)
if (use_icount) {
gen_io_start();
}
gen_helper_load_tbu(cpu_gpr[gprn]);
gen_helper_load_tbu(cpu_gpr[gprn], cpu_env);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -208,13 +208,13 @@ static void spr_read_tbu (void *opaque, int gprn, int sprn)
__attribute__ (( unused ))
static void spr_read_atbl (void *opaque, int gprn, int sprn)
{
gen_helper_load_atbl(cpu_gpr[gprn]);
gen_helper_load_atbl(cpu_gpr[gprn], cpu_env);
}
__attribute__ (( unused ))
static void spr_read_atbu (void *opaque, int gprn, int sprn)
{
gen_helper_load_atbu(cpu_gpr[gprn]);
gen_helper_load_atbu(cpu_gpr[gprn], cpu_env);
}
#if !defined(CONFIG_USER_ONLY)
@ -223,7 +223,7 @@ static void spr_write_tbl (void *opaque, int sprn, int gprn)
if (use_icount) {
gen_io_start();
}
gen_helper_store_tbl(cpu_gpr[gprn]);
gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -235,7 +235,7 @@ static void spr_write_tbu (void *opaque, int sprn, int gprn)
if (use_icount) {
gen_io_start();
}
gen_helper_store_tbu(cpu_gpr[gprn]);
gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]);
if (use_icount) {
gen_io_end();
gen_stop_exception(opaque);
@ -245,20 +245,20 @@ static void spr_write_tbu (void *opaque, int sprn, int gprn)
__attribute__ (( unused ))
static void spr_write_atbl (void *opaque, int sprn, int gprn)
{
gen_helper_store_atbl(cpu_gpr[gprn]);
gen_helper_store_atbl(cpu_env, cpu_gpr[gprn]);
}
__attribute__ (( unused ))
static void spr_write_atbu (void *opaque, int sprn, int gprn)
{
gen_helper_store_atbu(cpu_gpr[gprn]);
gen_helper_store_atbu(cpu_env, cpu_gpr[gprn]);
}
#if defined(TARGET_PPC64)
__attribute__ (( unused ))
static void spr_read_purr (void *opaque, int gprn, int sprn)
{
gen_helper_load_purr(cpu_gpr[gprn]);
gen_helper_load_purr(cpu_gpr[gprn], cpu_env);
}
#endif
#endif
@ -382,23 +382,23 @@ static void spr_write_asr (void *opaque, int sprn, int gprn)
/* RTC */
static void spr_read_601_rtcl (void *opaque, int gprn, int sprn)
{
gen_helper_load_601_rtcl(cpu_gpr[gprn]);
gen_helper_load_601_rtcl(cpu_gpr[gprn], cpu_env);
}
static void spr_read_601_rtcu (void *opaque, int gprn, int sprn)
{
gen_helper_load_601_rtcu(cpu_gpr[gprn]);
gen_helper_load_601_rtcu(cpu_gpr[gprn], cpu_env);
}
#if !defined(CONFIG_USER_ONLY)
static void spr_write_601_rtcu (void *opaque, int sprn, int gprn)
{
gen_helper_store_601_rtcu(cpu_gpr[gprn]);
gen_helper_store_601_rtcu(cpu_env, cpu_gpr[gprn]);
}
static void spr_write_601_rtcl (void *opaque, int sprn, int gprn)
{
gen_helper_store_601_rtcl(cpu_gpr[gprn]);
gen_helper_store_601_rtcl(cpu_env, cpu_gpr[gprn]);
}
static void spr_write_hid0_601 (void *opaque, int sprn, int gprn)
@ -437,12 +437,12 @@ static void spr_write_601_ubatl (void *opaque, int sprn, int gprn)
#if !defined(CONFIG_USER_ONLY)
static void spr_read_40x_pit (void *opaque, int gprn, int sprn)
{
gen_helper_load_40x_pit(cpu_gpr[gprn]);
gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env);
}
static void spr_write_40x_pit (void *opaque, int sprn, int gprn)
{
gen_helper_store_40x_pit(cpu_gpr[gprn]);
gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]);
}
static void spr_write_40x_dbcr0 (void *opaque, int sprn, int gprn)
@ -461,12 +461,12 @@ static void spr_write_40x_sler (void *opaque, int sprn, int gprn)
static void spr_write_booke_tcr (void *opaque, int sprn, int gprn)
{
gen_helper_store_booke_tcr(cpu_gpr[gprn]);
gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]);
}
static void spr_write_booke_tsr (void *opaque, int sprn, int gprn)
{
gen_helper_store_booke_tsr(cpu_gpr[gprn]);
gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]);
}
#endif