Add top level changes for moxie

Signed-off-by: Anthony Green <green@moxielogic.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Anthony Green 2013-03-18 15:49:25 -04:00 committed by Blue Swirl
parent a360d96582
commit d15a9c2390
6 changed files with 21 additions and 4 deletions

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@ -91,6 +91,11 @@ M: Aurelien Jarno <aurelien@aurel32.net>
S: Odd Fixes
F: target-mips/
Moxie
M: Anthony Green <green@moxielogic.com>
S: Maintained
F: target-moxie/
PowerPC
M: Alexander Graf <agraf@suse.de>
L: qemu-ppc@nongnu.org

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@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
#elif defined(TARGET_MOXIE)
#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)

9
configure vendored
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@ -961,6 +961,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@ -3947,7 +3948,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian="no"
case "$target_arch2" in
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@ -4051,6 +4052,8 @@ case "$target_arch2" in
echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak
target_long_alignment=8
;;
moxie)
;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@ -4288,6 +4291,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo "CONFIG_MIPS_DIS=y" >> $config_target_mak
echo "CONFIG_MIPS_DIS=y" >> config-all-disas.mak
;;
moxie*)
echo "CONFIG_MOXIE_DIS=y" >> $config_target_mak
echo "CONFIG_MOXIE_DIS=y" >> config-all-disas.mak
;;
or32)
echo "CONFIG_OPENRISC_DIS=y" >> $config_target_mak
echo "CONFIG_OPENRISC_DIS=y" >> config-all-disas.mak

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@ -240,6 +240,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@ -692,6 +693,7 @@ int cpu_exec(CPUArchState *env)
| env->cc_dest | (env->cc_x << 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)

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@ -0,0 +1 @@
# Default configuration for moxie-softmmu

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@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo: