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spapr_pci: Allow 2MiB and 16MiB IOMMU pagesizes by default 

We've had the qemu and kernel KVM infrastructure to handle larger TCE
page sizes for a while, but forgot to update the defaults to actually
allow them.  This turns that change on.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
David Gibson 2019-07-05 15:03:05 +10:00
parent 9aec2e52ce
commit d15d4ad64f
2 changed files with 8 additions and 1 deletions
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6
hw/ppc/spapr.c
View File

@ -4445,8 +4445,14 @@ DEFINE_SPAPR_MACHINE(4_2, "4.2", true);
*/
static void spapr_machine_4_1_class_options(MachineClass *mc)
{
static GlobalProperty compat[] = {
/* Only allow 4kiB and 64kiB IOMMU pagesizes */
{ TYPE_SPAPR_PCI_HOST_BRIDGE, "pgsz", "0x11000" },
};
spapr_machine_4_2_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_4_1, hw_compat_4_1_len);
compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
}
DEFINE_SPAPR_MACHINE(4_1, "4.1", false);

3
hw/ppc/spapr_pci.c
View File

@ -2093,7 +2093,8 @@ static Property spapr_phb_properties[] = {
0x800000000000000ULL),
DEFINE_PROP_BOOL("ddw", SpaprPhbState, ddw_enabled, true),
DEFINE_PROP_UINT64("pgsz", SpaprPhbState, page_size_mask,
(1ULL << 12) | (1ULL << 16)),
(1ULL << 12) | (1ULL << 16)
| (1ULL << 21) | (1ULL << 24)),
DEFINE_PROP_UINT32("numa_node", SpaprPhbState, numa_node, -1),
DEFINE_PROP_BOOL("pre-2.8-migration", SpaprPhbState,
pre_2_8_migration, false),