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target/loongarch: Update loongarch-fpu.xml

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Rename loongarch-fpu64.xml to loongarch-fpu.xml and update
loongarch-fpu.xml to match upstream GDB [1]

[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/fpu.xml

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220805033523.1416837-5-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2022-08-05 11:35:22 +08:00 committed by Richard Henderson
parent 96c3298c0a
commit d182c39000
4 changed files with 52 additions and 59 deletions
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2
configs/targets/loongarch64-softmmu.mak
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@ -1,5 +1,5 @@
TARGET_ARCH=loongarch64
TARGET_BASE_ARCH=loongarch
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu64.xml
TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
TARGET_NEED_FDT=y

50
gdb-xml/loongarch-fpu.xml Normal file
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@ -0,0 +1,50 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2021 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.fpu">
<union id="fputype">
<field name="f" type="ieee_single"/>
<field name="d" type="ieee_double"/>
</union>
<reg name="f0" bitsize="64" type="fputype" group="float"/>
<reg name="f1" bitsize="64" type="fputype" group="float"/>
<reg name="f2" bitsize="64" type="fputype" group="float"/>
<reg name="f3" bitsize="64" type="fputype" group="float"/>
<reg name="f4" bitsize="64" type="fputype" group="float"/>
<reg name="f5" bitsize="64" type="fputype" group="float"/>
<reg name="f6" bitsize="64" type="fputype" group="float"/>
<reg name="f7" bitsize="64" type="fputype" group="float"/>
<reg name="f8" bitsize="64" type="fputype" group="float"/>
<reg name="f9" bitsize="64" type="fputype" group="float"/>
<reg name="f10" bitsize="64" type="fputype" group="float"/>
<reg name="f11" bitsize="64" type="fputype" group="float"/>
<reg name="f12" bitsize="64" type="fputype" group="float"/>
<reg name="f13" bitsize="64" type="fputype" group="float"/>
<reg name="f14" bitsize="64" type="fputype" group="float"/>
<reg name="f15" bitsize="64" type="fputype" group="float"/>
<reg name="f16" bitsize="64" type="fputype" group="float"/>
<reg name="f17" bitsize="64" type="fputype" group="float"/>
<reg name="f18" bitsize="64" type="fputype" group="float"/>
<reg name="f19" bitsize="64" type="fputype" group="float"/>
<reg name="f20" bitsize="64" type="fputype" group="float"/>
<reg name="f21" bitsize="64" type="fputype" group="float"/>
<reg name="f22" bitsize="64" type="fputype" group="float"/>
<reg name="f23" bitsize="64" type="fputype" group="float"/>
<reg name="f24" bitsize="64" type="fputype" group="float"/>
<reg name="f25" bitsize="64" type="fputype" group="float"/>
<reg name="f26" bitsize="64" type="fputype" group="float"/>
<reg name="f27" bitsize="64" type="fputype" group="float"/>
<reg name="f28" bitsize="64" type="fputype" group="float"/>
<reg name="f29" bitsize="64" type="fputype" group="float"/>
<reg name="f30" bitsize="64" type="fputype" group="float"/>
<reg name="f31" bitsize="64" type="fputype" group="float"/>
<reg name="fcc" bitsize="64" type="uint64" group="float"/>
<reg name="fcsr" bitsize="32" type="uint32" group="float"/>
</feature>

57
gdb-xml/loongarch-fpu64.xml
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@ -1,57 +0,0 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2021 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.loongarch.fpu">
<union id="fpu64type">
<field name="f" type="ieee_single"/>
<field name="d" type="ieee_double"/>
</union>
<reg name="f0" bitsize="64" type="fpu64type" group="float"/>
<reg name="f1" bitsize="64" type="fpu64type" group="float"/>
<reg name="f2" bitsize="64" type="fpu64type" group="float"/>
<reg name="f3" bitsize="64" type="fpu64type" group="float"/>
<reg name="f4" bitsize="64" type="fpu64type" group="float"/>
<reg name="f5" bitsize="64" type="fpu64type" group="float"/>
<reg name="f6" bitsize="64" type="fpu64type" group="float"/>
<reg name="f7" bitsize="64" type="fpu64type" group="float"/>
<reg name="f8" bitsize="64" type="fpu64type" group="float"/>
<reg name="f9" bitsize="64" type="fpu64type" group="float"/>
<reg name="f10" bitsize="64" type="fpu64type" group="float"/>
<reg name="f11" bitsize="64" type="fpu64type" group="float"/>
<reg name="f12" bitsize="64" type="fpu64type" group="float"/>
<reg name="f13" bitsize="64" type="fpu64type" group="float"/>
<reg name="f14" bitsize="64" type="fpu64type" group="float"/>
<reg name="f15" bitsize="64" type="fpu64type" group="float"/>
<reg name="f16" bitsize="64" type="fpu64type" group="float"/>
<reg name="f17" bitsize="64" type="fpu64type" group="float"/>
<reg name="f18" bitsize="64" type="fpu64type" group="float"/>
<reg name="f19" bitsize="64" type="fpu64type" group="float"/>
<reg name="f20" bitsize="64" type="fpu64type" group="float"/>
<reg name="f21" bitsize="64" type="fpu64type" group="float"/>
<reg name="f22" bitsize="64" type="fpu64type" group="float"/>
<reg name="f23" bitsize="64" type="fpu64type" group="float"/>
<reg name="f24" bitsize="64" type="fpu64type" group="float"/>
<reg name="f25" bitsize="64" type="fpu64type" group="float"/>
<reg name="f26" bitsize="64" type="fpu64type" group="float"/>
<reg name="f27" bitsize="64" type="fpu64type" group="float"/>
<reg name="f28" bitsize="64" type="fpu64type" group="float"/>
<reg name="f29" bitsize="64" type="fpu64type" group="float"/>
<reg name="f30" bitsize="64" type="fpu64type" group="float"/>
<reg name="f31" bitsize="64" type="fpu64type" group="float"/>
<reg name="fcc0" bitsize="8" type="uint8" group="float"/>
<reg name="fcc1" bitsize="8" type="uint8" group="float"/>
<reg name="fcc2" bitsize="8" type="uint8" group="float"/>
<reg name="fcc3" bitsize="8" type="uint8" group="float"/>
<reg name="fcc4" bitsize="8" type="uint8" group="float"/>
<reg name="fcc5" bitsize="8" type="uint8" group="float"/>
<reg name="fcc6" bitsize="8" type="uint8" group="float"/>
<reg name="fcc7" bitsize="8" type="uint8" group="float"/>
<reg name="fcsr" bitsize="32" type="uint32" group="float"/>
</feature>

2
target/loongarch/gdbstub.c
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@ -80,5 +80,5 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env,
void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)
{
gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
41, "loongarch-fpu64.xml", 0);
41, "loongarch-fpu.xml", 0);
}