From d1b6b7017572e8d82f26eb827a1dba0e8cf3cae6 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 1 Oct 2020 17:01:16 +0100 Subject: [PATCH] target/arm: Make '-cpu max' have a 48-bit PA QEMU supports a 48-bit physical address range, but we don't currently expose it in the '-cpu max' ID registers (you get the same range as Cortex-A57, which is 44 bits). Set the ID_AA64MMFR0.PARange field to indicate 48 bits. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20201001160116.18095-1-peter.maydell@linaro.org --- target/arm/cpu64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index e00271b932..649213082f 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -653,6 +653,10 @@ static void aarch64_max_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2); cpu->isar.id_aa64pfr1 = t; + t = cpu->isar.id_aa64mmfr0; + t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 5); /* PARange: 48 bits */ + cpu->isar.id_aa64mmfr0 = t; + t = cpu->isar.id_aa64mmfr1; t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);