diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 7233b8b141..50e162a27b 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -35,6 +35,7 @@
 #define TT_NFPU_INSN 0x04
 #define TT_WIN_OVF  0x05
 #define TT_WIN_UNF  0x06 
+#define TT_UNALIGNED 0x07
 #define TT_FP_EXCP  0x08
 #define TT_DFAULT   0x09
 #define TT_TOVF     0x0a
@@ -55,6 +56,7 @@
 #define TT_DFAULT   0x30
 #define TT_DMISS    0x31
 #define TT_DPROT    0x32
+#define TT_UNALIGNED 0x34
 #define TT_PRIV_ACT 0x37
 #define TT_EXTINT   0x40
 #define TT_SPILL    0x80
diff --git a/target-sparc/op.c b/target-sparc/op.c
index c9f068457e..96c8b2db72 100644
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -1486,7 +1486,10 @@ void OPPROTO op_movl_npc_im(void)
 
 void OPPROTO op_movl_npc_T0(void)
 {
-    env->npc = T0;
+    if (T0 & 0x3)
+	raise_exception(TT_UNALIGNED);
+    else
+	env->npc = T0;
 }
 
 void OPPROTO op_mov_pc_npc(void)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 21612bd238..2edc8d7415 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -923,7 +923,11 @@ void do_interrupt(int intno)
 
 #if !defined(CONFIG_USER_ONLY) 
 
+static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
+                                void *retaddr);
+
 #define MMUSUFFIX _mmu
+#define ALIGNED_ONLY
 #define GETPC() (__builtin_return_address(0))
 
 #define SHIFT 0
@@ -938,6 +942,14 @@ void do_interrupt(int intno)
 #define SHIFT 3
 #include "softmmu_template.h"
 
+static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
+                                void *retaddr)
+{
+    /* Uncomment the following line to enable mem_address_not_aligned traps */
+    /* Not enabled yet because of bugs in OpenBIOS */
+    //raise_exception(TT_UNALIGNED);
+    //printf("Unaligned access to 0x%x from 0x%x\n", addr, env->pc);
+}
 
 /* try to fill the TLB and return an exception if error. If retaddr is
    NULL, it means that the function was called in C code (i.e. not
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index e51a2e459c..19b10a200f 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -25,7 +25,6 @@
    Rest of V9 instructions, VIS instructions
    NPC/PC static optimisations (use JUMP_TB when possible)
    Optimize synthetic instructions
-   Optional alignment check
    128-bit float
 */