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hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic'

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This remove a use of 'struct' in the DECLARE_INSTANCE_CHECKER()
macro call, to avoid after a QOM refactor:

  hw/intc/xilinx_intc.c:45:1: error: declaration of anonymous struct must be a definition
  DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
                           ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Message-id: 20230109140306.23161-14-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-01-09 15:03:05 +01:00 committed by Peter Maydell
parent 95700465ac
commit d2960be0c3
1 changed files with 13 additions and 15 deletions
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28
hw/intc/xilinx_intc.c
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@ -42,10 +42,10 @@
#define R_MAX 8
#define TYPE_XILINX_INTC "xlnx.xps-intc"
DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
TYPE_XILINX_INTC)
typedef struct XpsIntc XpsIntc;
DECLARE_INSTANCE_CHECKER(XpsIntc, XILINX_INTC, TYPE_XILINX_INTC)
struct xlx_pic
struct XpsIntc
{
SysBusDevice parent_obj;
@ -62,7 +62,7 @@ struct xlx_pic
uint32_t irq_pin_state;
};
static void update_irq(struct xlx_pic *p)
static void update_irq(XpsIntc *p)
{
uint32_t i;
@ -87,10 +87,9 @@ static void update_irq(struct xlx_pic *p)
qemu_set_irq(p->parent_irq, (p->regs[R_MER] & 1) && p->regs[R_IPR]);
}
static uint64_t
pic_read(void *opaque, hwaddr addr, unsigned int size)
static uint64_t pic_read(void *opaque, hwaddr addr, unsigned int size)
{
struct xlx_pic *p = opaque;
XpsIntc *p = opaque;
uint32_t r = 0;
addr >>= 2;
@ -106,11 +105,10 @@ pic_read(void *opaque, hwaddr addr, unsigned int size)
return r;
}
static void
pic_write(void *opaque, hwaddr addr,
uint64_t val64, unsigned int size)
static void pic_write(void *opaque, hwaddr addr,
uint64_t val64, unsigned int size)
{
struct xlx_pic *p = opaque;
XpsIntc *p = opaque;
uint32_t value = val64;
addr >>= 2;
@ -154,7 +152,7 @@ static const MemoryRegionOps pic_ops = {
static void irq_handler(void *opaque, int irq, int level)
{
struct xlx_pic *p = opaque;
XpsIntc *p = opaque;
/* edge triggered interrupt */
if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
@ -168,7 +166,7 @@ static void irq_handler(void *opaque, int irq, int level)
static void xilinx_intc_init(Object *obj)
{
struct xlx_pic *p = XILINX_INTC(obj);
XpsIntc *p = XILINX_INTC(obj);
qdev_init_gpio_in(DEVICE(obj), irq_handler, 32);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &p->parent_irq);
@ -179,7 +177,7 @@ static void xilinx_intc_init(Object *obj)
}
static Property xilinx_intc_properties[] = {
DEFINE_PROP_UINT32("kind-of-intr", struct xlx_pic, c_kind_of_intr, 0),
DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0),
DEFINE_PROP_END_OF_LIST(),
};
@ -193,7 +191,7 @@ static void xilinx_intc_class_init(ObjectClass *klass, void *data)
static const TypeInfo xilinx_intc_info = {
.name = TYPE_XILINX_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(struct xlx_pic),
.instance_size = sizeof(XpsIntc),
.instance_init = xilinx_intc_init,
.class_init = xilinx_intc_class_init,
};