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target/sh4: Avoid tcg_const_i32 for TAS.B 

Since we're assigning to cpu_sr_t in the end,
use that as the intermediate temp as well.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-26 10:52:48 -10:00
parent 5bd9790ebc
commit d3c2b2b366
1 changed files with 3 additions and 6 deletions
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9
target/sh4/translate.c
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@ -1610,12 +1610,9 @@ static void _decode_opc(DisasContext * ctx)
tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 16);
return;
case 0x401b: /* tas.b @Rn */
{
TCGv val = tcg_const_i32(0x80);
tcg_gen_atomic_fetch_or_i32(val, REG(B11_8), val,
ctx->memidx, MO_UB);
tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, val, 0);
}
tcg_gen_atomic_fetch_or_i32(cpu_sr_t, REG(B11_8),
tcg_constant_i32(0x80), ctx->memidx, MO_UB);
tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, cpu_sr_t, 0);
return;
case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */
CHECK_FPU_ENABLED